hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3
commit09380dd131eadf31a7ff286e766892b9a1ec6e31
authorPeter Maydell <peter.maydell@linaro.org>
Thu, 23 May 2019 13:47:44 +0000 (23 14:47 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 23 May 2019 13:47:44 +0000 (23 14:47 +0100)
tree6ada3ff7c37630b50551a7051a875608941ce914
parent8b7fbd6c36b868ad16cb7065dbba93ac342479af
hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3

The ICC_CTLR_EL3 register includes some bits which are aliases
of bits in the ICC_CTLR_EL1(S) and (NS) registers. QEMU chooses
to keep those bits in the cs->icc_ctlr_el1[] struct fields.
Unfortunately a missing '~' in the code to update the bits
in those fields meant that writing to ICC_CTLR_EL3 would corrupt
the ICC_CLTR_EL1 register values.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190520162809.2677-5-peter.maydell@linaro.org
hw/intc/arm_gicv3_cpuif.c