| commit | 0922f1e4872656f7643fb2bc8459bea6964de085 | |
| author | David Gibson <david@gibson.dropbear.id.au> | |
| Thu, 2 Mar 2017 01:13:07 +0000 (2 12:13 +1100) | ||
| committer | David Gibson <david@gibson.dropbear.id.au> | |
| Fri, 3 Mar 2017 00:30:59 +0000 (3 11:30 +1100) | ||
| tree | 99030a4a7ad4fa6d21347e3fd2a6dcd72ddbdcb3 | treesnapshot (tar.gz zip) |
| parent | eaa477ca4ef59eed2c77d81937b981ff823def3b | commitdiff |
target/ppc/POWER9: Add POWERPC_MMU_V3 bit
For easier handling of future processors using the POWER9 or something
close to it, add a new bit in the MMU model. This was originally from a
revised version of 86cf1e9 "target/ppc/POWER9: Add ISAv3.00 MMU definition"
but the older version of the patch was already merged. This makes the
change on top of the original version.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
For easier handling of future processors using the POWER9 or something
close to it, add a new bit in the MMU model. This was originally from a
revised version of 86cf1e9 "target/ppc/POWER9: Add ISAv3.00 MMU definition"
but the older version of the patch was already merged. This makes the
change on top of the original version.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| target/ppc/cpu-qom.h | diffblobblamehistory |