target/riscv: Change gen_set_pc_imm to gen_update_pc
commit022c7550d994496d38c035e2290f9f8979065bad
authorWeiwei Li <liweiwei@iscas.ac.cn>
Fri, 26 May 2023 07:21:21 +0000 (26 15:21 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Tue, 13 Jun 2023 07:35:20 +0000 (13 17:35 +1000)
tree116ee3534cb38ef4abbe96e60bfa6965298153a2
parent1df8497b9d21a15a2dac1ecb49c9f07096e31ce2
target/riscv: Change gen_set_pc_imm to gen_update_pc

Reduce reliance on absolute values(by passing pc difference) to
prepare for PC-relative translation.

Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230526072124.298466-5-liweiwei@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/insn_trans/trans_privileged.c.inc
target/riscv/insn_trans/trans_rvi.c.inc
target/riscv/insn_trans/trans_rvv.c.inc
target/riscv/insn_trans/trans_rvzawrs.c.inc
target/riscv/insn_trans/trans_xthead.c.inc
target/riscv/translate.c