4 * Copyright (C) 2014 Red Hat Inc
7 * Marcel Apfelbaum <marcel.a@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qapi/qmp/qerror.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "hw/loader.h"
20 #include "qapi/error.h"
21 #include "qapi/qapi-visit-common.h"
22 #include "qapi/visitor.h"
23 #include "hw/sysbus.h"
24 #include "sysemu/cpus.h"
25 #include "sysemu/sysemu.h"
26 #include "sysemu/reset.h"
27 #include "sysemu/runstate.h"
28 #include "sysemu/numa.h"
29 #include "qemu/error-report.h"
30 #include "sysemu/qtest.h"
31 #include "hw/pci/pci.h"
32 #include "hw/mem/nvdimm.h"
33 #include "migration/global_state.h"
34 #include "migration/vmstate.h"
35 #include "exec/confidential-guest-support.h"
36 #include "hw/virtio/virtio.h"
37 #include "hw/virtio/virtio-pci.h"
39 GlobalProperty hw_compat_6_0
[] = {
40 { "gpex-pcihost", "allow-unmapped-accesses", "false" },
41 { "i8042", "extended-state", "false"},
43 const size_t hw_compat_6_0_len
= G_N_ELEMENTS(hw_compat_6_0
);
45 GlobalProperty hw_compat_5_2
[] = {
46 { "ICH9-LPC", "smm-compat", "on"},
47 { "PIIX4_PM", "smm-compat", "on"},
48 { "virtio-blk-device", "report-discard-granularity", "off" },
49 { "virtio-net-pci", "vectors", "3"},
51 const size_t hw_compat_5_2_len
= G_N_ELEMENTS(hw_compat_5_2
);
53 GlobalProperty hw_compat_5_1
[] = {
54 { "vhost-scsi", "num_queues", "1"},
55 { "vhost-user-blk", "num-queues", "1"},
56 { "vhost-user-scsi", "num_queues", "1"},
57 { "virtio-blk-device", "num-queues", "1"},
58 { "virtio-scsi-device", "num_queues", "1"},
59 { "nvme", "use-intel-id", "on"},
60 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
61 { "pl011", "migrate-clk", "off" },
62 { "virtio-pci", "x-ats-page-aligned", "off"},
64 const size_t hw_compat_5_1_len
= G_N_ELEMENTS(hw_compat_5_1
);
66 GlobalProperty hw_compat_5_0
[] = {
67 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
68 { "virtio-balloon-device", "page-poison", "false" },
69 { "vmport", "x-read-set-eax", "off" },
70 { "vmport", "x-signal-unsupported-cmd", "off" },
71 { "vmport", "x-report-vmx-type", "off" },
72 { "vmport", "x-cmds-v2", "off" },
73 { "virtio-device", "x-disable-legacy-check", "true" },
75 const size_t hw_compat_5_0_len
= G_N_ELEMENTS(hw_compat_5_0
);
77 GlobalProperty hw_compat_4_2
[] = {
78 { "virtio-blk-device", "queue-size", "128"},
79 { "virtio-scsi-device", "virtqueue_size", "128"},
80 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
81 { "virtio-blk-device", "seg-max-adjust", "off"},
82 { "virtio-scsi-device", "seg_max_adjust", "off"},
83 { "vhost-blk-device", "seg_max_adjust", "off"},
84 { "usb-host", "suppress-remote-wake", "off" },
85 { "usb-redir", "suppress-remote-wake", "off" },
86 { "qxl", "revision", "4" },
87 { "qxl-vga", "revision", "4" },
88 { "fw_cfg", "acpi-mr-restore", "false" },
89 { "virtio-device", "use-disabled-flag", "false" },
91 const size_t hw_compat_4_2_len
= G_N_ELEMENTS(hw_compat_4_2
);
93 GlobalProperty hw_compat_4_1
[] = {
94 { "virtio-pci", "x-pcie-flr-init", "off" },
96 const size_t hw_compat_4_1_len
= G_N_ELEMENTS(hw_compat_4_1
);
98 GlobalProperty hw_compat_4_0
[] = {
99 { "VGA", "edid", "false" },
100 { "secondary-vga", "edid", "false" },
101 { "bochs-display", "edid", "false" },
102 { "virtio-vga", "edid", "false" },
103 { "virtio-gpu-device", "edid", "false" },
104 { "virtio-device", "use-started", "false" },
105 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
106 { "pl031", "migrate-tick-offset", "false" },
108 const size_t hw_compat_4_0_len
= G_N_ELEMENTS(hw_compat_4_0
);
110 GlobalProperty hw_compat_3_1
[] = {
111 { "pcie-root-port", "x-speed", "2_5" },
112 { "pcie-root-port", "x-width", "1" },
113 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
114 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
115 { "tpm-crb", "ppi", "false" },
116 { "tpm-tis", "ppi", "false" },
117 { "usb-kbd", "serial", "42" },
118 { "usb-mouse", "serial", "42" },
119 { "usb-tablet", "serial", "42" },
120 { "virtio-blk-device", "discard", "false" },
121 { "virtio-blk-device", "write-zeroes", "false" },
122 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
123 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
125 const size_t hw_compat_3_1_len
= G_N_ELEMENTS(hw_compat_3_1
);
127 GlobalProperty hw_compat_3_0
[] = {};
128 const size_t hw_compat_3_0_len
= G_N_ELEMENTS(hw_compat_3_0
);
130 GlobalProperty hw_compat_2_12
[] = {
131 { "migration", "decompress-error-check", "off" },
132 { "hda-audio", "use-timer", "false" },
133 { "cirrus-vga", "global-vmstate", "true" },
134 { "VGA", "global-vmstate", "true" },
135 { "vmware-svga", "global-vmstate", "true" },
136 { "qxl-vga", "global-vmstate", "true" },
138 const size_t hw_compat_2_12_len
= G_N_ELEMENTS(hw_compat_2_12
);
140 GlobalProperty hw_compat_2_11
[] = {
141 { "hpet", "hpet-offset-saved", "false" },
142 { "virtio-blk-pci", "vectors", "2" },
143 { "vhost-user-blk-pci", "vectors", "2" },
144 { "e1000", "migrate_tso_props", "off" },
146 const size_t hw_compat_2_11_len
= G_N_ELEMENTS(hw_compat_2_11
);
148 GlobalProperty hw_compat_2_10
[] = {
149 { "virtio-mouse-device", "wheel-axis", "false" },
150 { "virtio-tablet-device", "wheel-axis", "false" },
152 const size_t hw_compat_2_10_len
= G_N_ELEMENTS(hw_compat_2_10
);
154 GlobalProperty hw_compat_2_9
[] = {
155 { "pci-bridge", "shpc", "off" },
156 { "intel-iommu", "pt", "off" },
157 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
158 { "pcie-root-port", "x-migrate-msix", "false" },
160 const size_t hw_compat_2_9_len
= G_N_ELEMENTS(hw_compat_2_9
);
162 GlobalProperty hw_compat_2_8
[] = {
163 { "fw_cfg_mem", "x-file-slots", "0x10" },
164 { "fw_cfg_io", "x-file-slots", "0x10" },
165 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
166 { "pci-bridge", "shpc", "on" },
167 { TYPE_PCI_DEVICE
, "x-pcie-extcap-init", "off" },
168 { "virtio-pci", "x-pcie-deverr-init", "off" },
169 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
170 { "virtio-pci", "x-pcie-pm-init", "off" },
171 { "cirrus-vga", "vgamem_mb", "8" },
172 { "isa-cirrus-vga", "vgamem_mb", "8" },
174 const size_t hw_compat_2_8_len
= G_N_ELEMENTS(hw_compat_2_8
);
176 GlobalProperty hw_compat_2_7
[] = {
177 { "virtio-pci", "page-per-vq", "on" },
178 { "virtio-serial-device", "emergency-write", "off" },
179 { "ioapic", "version", "0x11" },
180 { "intel-iommu", "x-buggy-eim", "true" },
181 { "virtio-pci", "x-ignore-backend-features", "on" },
183 const size_t hw_compat_2_7_len
= G_N_ELEMENTS(hw_compat_2_7
);
185 GlobalProperty hw_compat_2_6
[] = {
186 { "virtio-mmio", "format_transport_address", "off" },
187 /* Optional because not all virtio-pci devices support legacy mode */
188 { "virtio-pci", "disable-modern", "on", .optional
= true },
189 { "virtio-pci", "disable-legacy", "off", .optional
= true },
191 const size_t hw_compat_2_6_len
= G_N_ELEMENTS(hw_compat_2_6
);
193 GlobalProperty hw_compat_2_5
[] = {
194 { "isa-fdc", "fallback", "144" },
195 { "pvscsi", "x-old-pci-configuration", "on" },
196 { "pvscsi", "x-disable-pcie", "on" },
197 { "vmxnet3", "x-old-msi-offsets", "on" },
198 { "vmxnet3", "x-disable-pcie", "on" },
200 const size_t hw_compat_2_5_len
= G_N_ELEMENTS(hw_compat_2_5
);
202 GlobalProperty hw_compat_2_4
[] = {
203 /* Optional because the 'scsi' property is Linux-only */
204 { "virtio-blk-device", "scsi", "true", .optional
= true },
205 { "e1000", "extra_mac_registers", "off" },
206 { "virtio-pci", "x-disable-pcie", "on" },
207 { "virtio-pci", "migrate-extra", "off" },
208 { "fw_cfg_mem", "dma_enabled", "off" },
209 { "fw_cfg_io", "dma_enabled", "off" }
211 const size_t hw_compat_2_4_len
= G_N_ELEMENTS(hw_compat_2_4
);
213 GlobalProperty hw_compat_2_3
[] = {
214 { "virtio-blk-pci", "any_layout", "off" },
215 { "virtio-balloon-pci", "any_layout", "off" },
216 { "virtio-serial-pci", "any_layout", "off" },
217 { "virtio-9p-pci", "any_layout", "off" },
218 { "virtio-rng-pci", "any_layout", "off" },
219 { TYPE_PCI_DEVICE
, "x-pcie-lnksta-dllla", "off" },
220 { "migration", "send-configuration", "off" },
221 { "migration", "send-section-footer", "off" },
222 { "migration", "store-global-state", "off" },
224 const size_t hw_compat_2_3_len
= G_N_ELEMENTS(hw_compat_2_3
);
226 GlobalProperty hw_compat_2_2
[] = {};
227 const size_t hw_compat_2_2_len
= G_N_ELEMENTS(hw_compat_2_2
);
229 GlobalProperty hw_compat_2_1
[] = {
230 { "intel-hda", "old_msi_addr", "on" },
231 { "VGA", "qemu-extended-regs", "off" },
232 { "secondary-vga", "qemu-extended-regs", "off" },
233 { "virtio-scsi-pci", "any_layout", "off" },
234 { "usb-mouse", "usb_version", "1" },
235 { "usb-kbd", "usb_version", "1" },
236 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
238 const size_t hw_compat_2_1_len
= G_N_ELEMENTS(hw_compat_2_1
);
240 MachineState
*current_machine
;
242 static char *machine_get_kernel(Object
*obj
, Error
**errp
)
244 MachineState
*ms
= MACHINE(obj
);
246 return g_strdup(ms
->kernel_filename
);
249 static void machine_set_kernel(Object
*obj
, const char *value
, Error
**errp
)
251 MachineState
*ms
= MACHINE(obj
);
253 g_free(ms
->kernel_filename
);
254 ms
->kernel_filename
= g_strdup(value
);
257 static char *machine_get_initrd(Object
*obj
, Error
**errp
)
259 MachineState
*ms
= MACHINE(obj
);
261 return g_strdup(ms
->initrd_filename
);
264 static void machine_set_initrd(Object
*obj
, const char *value
, Error
**errp
)
266 MachineState
*ms
= MACHINE(obj
);
268 g_free(ms
->initrd_filename
);
269 ms
->initrd_filename
= g_strdup(value
);
272 static char *machine_get_append(Object
*obj
, Error
**errp
)
274 MachineState
*ms
= MACHINE(obj
);
276 return g_strdup(ms
->kernel_cmdline
);
279 static void machine_set_append(Object
*obj
, const char *value
, Error
**errp
)
281 MachineState
*ms
= MACHINE(obj
);
283 g_free(ms
->kernel_cmdline
);
284 ms
->kernel_cmdline
= g_strdup(value
);
287 static char *machine_get_dtb(Object
*obj
, Error
**errp
)
289 MachineState
*ms
= MACHINE(obj
);
291 return g_strdup(ms
->dtb
);
294 static void machine_set_dtb(Object
*obj
, const char *value
, Error
**errp
)
296 MachineState
*ms
= MACHINE(obj
);
299 ms
->dtb
= g_strdup(value
);
302 static char *machine_get_dumpdtb(Object
*obj
, Error
**errp
)
304 MachineState
*ms
= MACHINE(obj
);
306 return g_strdup(ms
->dumpdtb
);
309 static void machine_set_dumpdtb(Object
*obj
, const char *value
, Error
**errp
)
311 MachineState
*ms
= MACHINE(obj
);
314 ms
->dumpdtb
= g_strdup(value
);
317 static void machine_get_phandle_start(Object
*obj
, Visitor
*v
,
318 const char *name
, void *opaque
,
321 MachineState
*ms
= MACHINE(obj
);
322 int64_t value
= ms
->phandle_start
;
324 visit_type_int(v
, name
, &value
, errp
);
327 static void machine_set_phandle_start(Object
*obj
, Visitor
*v
,
328 const char *name
, void *opaque
,
331 MachineState
*ms
= MACHINE(obj
);
334 if (!visit_type_int(v
, name
, &value
, errp
)) {
338 ms
->phandle_start
= value
;
341 static char *machine_get_dt_compatible(Object
*obj
, Error
**errp
)
343 MachineState
*ms
= MACHINE(obj
);
345 return g_strdup(ms
->dt_compatible
);
348 static void machine_set_dt_compatible(Object
*obj
, const char *value
, Error
**errp
)
350 MachineState
*ms
= MACHINE(obj
);
352 g_free(ms
->dt_compatible
);
353 ms
->dt_compatible
= g_strdup(value
);
356 static bool machine_get_dump_guest_core(Object
*obj
, Error
**errp
)
358 MachineState
*ms
= MACHINE(obj
);
360 return ms
->dump_guest_core
;
363 static void machine_set_dump_guest_core(Object
*obj
, bool value
, Error
**errp
)
365 MachineState
*ms
= MACHINE(obj
);
367 ms
->dump_guest_core
= value
;
370 static bool machine_get_mem_merge(Object
*obj
, Error
**errp
)
372 MachineState
*ms
= MACHINE(obj
);
374 return ms
->mem_merge
;
377 static void machine_set_mem_merge(Object
*obj
, bool value
, Error
**errp
)
379 MachineState
*ms
= MACHINE(obj
);
381 ms
->mem_merge
= value
;
384 static bool machine_get_usb(Object
*obj
, Error
**errp
)
386 MachineState
*ms
= MACHINE(obj
);
391 static void machine_set_usb(Object
*obj
, bool value
, Error
**errp
)
393 MachineState
*ms
= MACHINE(obj
);
396 ms
->usb_disabled
= !value
;
399 static bool machine_get_graphics(Object
*obj
, Error
**errp
)
401 MachineState
*ms
= MACHINE(obj
);
403 return ms
->enable_graphics
;
406 static void machine_set_graphics(Object
*obj
, bool value
, Error
**errp
)
408 MachineState
*ms
= MACHINE(obj
);
410 ms
->enable_graphics
= value
;
413 static char *machine_get_firmware(Object
*obj
, Error
**errp
)
415 MachineState
*ms
= MACHINE(obj
);
417 return g_strdup(ms
->firmware
);
420 static void machine_set_firmware(Object
*obj
, const char *value
, Error
**errp
)
422 MachineState
*ms
= MACHINE(obj
);
424 g_free(ms
->firmware
);
425 ms
->firmware
= g_strdup(value
);
428 static void machine_set_suppress_vmdesc(Object
*obj
, bool value
, Error
**errp
)
430 MachineState
*ms
= MACHINE(obj
);
432 ms
->suppress_vmdesc
= value
;
435 static bool machine_get_suppress_vmdesc(Object
*obj
, Error
**errp
)
437 MachineState
*ms
= MACHINE(obj
);
439 return ms
->suppress_vmdesc
;
442 static char *machine_get_memory_encryption(Object
*obj
, Error
**errp
)
444 MachineState
*ms
= MACHINE(obj
);
447 return g_strdup(object_get_canonical_path_component(OBJECT(ms
->cgs
)));
453 static void machine_set_memory_encryption(Object
*obj
, const char *value
,
457 object_resolve_path_component(object_get_objects_root(), value
);
460 error_setg(errp
, "No such memory encryption object '%s'", value
);
464 object_property_set_link(obj
, "confidential-guest-support", cgs
, errp
);
467 static void machine_check_confidential_guest_support(const Object
*obj
,
473 * So far the only constraint is that the target has the
474 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
479 static bool machine_get_nvdimm(Object
*obj
, Error
**errp
)
481 MachineState
*ms
= MACHINE(obj
);
483 return ms
->nvdimms_state
->is_enabled
;
486 static void machine_set_nvdimm(Object
*obj
, bool value
, Error
**errp
)
488 MachineState
*ms
= MACHINE(obj
);
490 ms
->nvdimms_state
->is_enabled
= value
;
493 static bool machine_get_hmat(Object
*obj
, Error
**errp
)
495 MachineState
*ms
= MACHINE(obj
);
497 return ms
->numa_state
->hmat_enabled
;
500 static void machine_set_hmat(Object
*obj
, bool value
, Error
**errp
)
502 MachineState
*ms
= MACHINE(obj
);
504 ms
->numa_state
->hmat_enabled
= value
;
507 static char *machine_get_nvdimm_persistence(Object
*obj
, Error
**errp
)
509 MachineState
*ms
= MACHINE(obj
);
511 return g_strdup(ms
->nvdimms_state
->persistence_string
);
514 static void machine_set_nvdimm_persistence(Object
*obj
, const char *value
,
517 MachineState
*ms
= MACHINE(obj
);
518 NVDIMMState
*nvdimms_state
= ms
->nvdimms_state
;
520 if (strcmp(value
, "cpu") == 0) {
521 nvdimms_state
->persistence
= 3;
522 } else if (strcmp(value
, "mem-ctrl") == 0) {
523 nvdimms_state
->persistence
= 2;
525 error_setg(errp
, "-machine nvdimm-persistence=%s: unsupported option",
530 g_free(nvdimms_state
->persistence_string
);
531 nvdimms_state
->persistence_string
= g_strdup(value
);
534 void machine_class_allow_dynamic_sysbus_dev(MachineClass
*mc
, const char *type
)
536 QAPI_LIST_PREPEND(mc
->allowed_dynamic_sysbus_devices
, g_strdup(type
));
539 bool device_is_dynamic_sysbus(MachineClass
*mc
, DeviceState
*dev
)
541 bool allowed
= false;
543 Object
*obj
= OBJECT(dev
);
545 if (!object_dynamic_cast(obj
, TYPE_SYS_BUS_DEVICE
)) {
549 for (wl
= mc
->allowed_dynamic_sysbus_devices
;
552 allowed
|= !!object_dynamic_cast(obj
, wl
->value
);
558 static void validate_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
560 MachineState
*machine
= opaque
;
561 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
563 if (!device_is_dynamic_sysbus(mc
, DEVICE(sbdev
))) {
564 error_report("Option '-device %s' cannot be handled by this machine",
565 object_class_get_name(object_get_class(OBJECT(sbdev
))));
570 static char *machine_get_memdev(Object
*obj
, Error
**errp
)
572 MachineState
*ms
= MACHINE(obj
);
574 return g_strdup(ms
->ram_memdev_id
);
577 static void machine_set_memdev(Object
*obj
, const char *value
, Error
**errp
)
579 MachineState
*ms
= MACHINE(obj
);
581 g_free(ms
->ram_memdev_id
);
582 ms
->ram_memdev_id
= g_strdup(value
);
586 static void machine_init_notify(Notifier
*notifier
, void *data
)
588 MachineState
*machine
= MACHINE(qdev_get_machine());
591 * Loop through all dynamically created sysbus devices and check if they are
592 * all allowed. If a device is not allowed, error out.
594 foreach_dynamic_sysbus_device(validate_sysbus_device
, machine
);
597 HotpluggableCPUList
*machine_query_hotpluggable_cpus(MachineState
*machine
)
600 HotpluggableCPUList
*head
= NULL
;
601 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
603 /* force board to initialize possible_cpus if it hasn't been done yet */
604 mc
->possible_cpu_arch_ids(machine
);
606 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
608 HotpluggableCPU
*cpu_item
= g_new0(typeof(*cpu_item
), 1);
610 cpu_item
->type
= g_strdup(machine
->possible_cpus
->cpus
[i
].type
);
611 cpu_item
->vcpus_count
= machine
->possible_cpus
->cpus
[i
].vcpus_count
;
612 cpu_item
->props
= g_memdup(&machine
->possible_cpus
->cpus
[i
].props
,
613 sizeof(*cpu_item
->props
));
615 cpu
= machine
->possible_cpus
->cpus
[i
].cpu
;
617 cpu_item
->has_qom_path
= true;
618 cpu_item
->qom_path
= object_get_canonical_path(cpu
);
620 QAPI_LIST_PREPEND(head
, cpu_item
);
626 * machine_set_cpu_numa_node:
627 * @machine: machine object to modify
628 * @props: specifies which cpu objects to assign to
629 * numa node specified by @props.node_id
630 * @errp: if an error occurs, a pointer to an area to store the error
632 * Associate NUMA node specified by @props.node_id with cpu slots that
633 * match socket/core/thread-ids specified by @props. It's recommended to use
634 * query-hotpluggable-cpus.props values to specify affected cpu slots,
635 * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
637 * However for CLI convenience it's possible to pass in subset of properties,
638 * which would affect all cpu slots that match it.
640 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
641 * -numa cpu,node-id=0,socket_id=0 \
642 * -numa cpu,node-id=1,socket_id=1
643 * will assign all child cores of socket 0 to node 0 and
644 * of socket 1 to node 1.
646 * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
648 * Empty subset is disallowed and function will return with error in this case.
650 void machine_set_cpu_numa_node(MachineState
*machine
,
651 const CpuInstanceProperties
*props
, Error
**errp
)
653 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
654 NodeInfo
*numa_info
= machine
->numa_state
->nodes
;
658 if (!mc
->possible_cpu_arch_ids
) {
659 error_setg(errp
, "mapping of CPUs to NUMA node is not supported");
663 /* disabling node mapping is not supported, forbid it */
664 assert(props
->has_node_id
);
666 /* force board to initialize possible_cpus if it hasn't been done yet */
667 mc
->possible_cpu_arch_ids(machine
);
669 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
670 CPUArchId
*slot
= &machine
->possible_cpus
->cpus
[i
];
672 /* reject unsupported by board properties */
673 if (props
->has_thread_id
&& !slot
->props
.has_thread_id
) {
674 error_setg(errp
, "thread-id is not supported");
678 if (props
->has_core_id
&& !slot
->props
.has_core_id
) {
679 error_setg(errp
, "core-id is not supported");
683 if (props
->has_socket_id
&& !slot
->props
.has_socket_id
) {
684 error_setg(errp
, "socket-id is not supported");
688 if (props
->has_die_id
&& !slot
->props
.has_die_id
) {
689 error_setg(errp
, "die-id is not supported");
693 /* skip slots with explicit mismatch */
694 if (props
->has_thread_id
&& props
->thread_id
!= slot
->props
.thread_id
) {
698 if (props
->has_core_id
&& props
->core_id
!= slot
->props
.core_id
) {
702 if (props
->has_die_id
&& props
->die_id
!= slot
->props
.die_id
) {
706 if (props
->has_socket_id
&& props
->socket_id
!= slot
->props
.socket_id
) {
710 /* reject assignment if slot is already assigned, for compatibility
711 * of legacy cpu_index mapping with SPAPR core based mapping do not
712 * error out if cpu thread and matched core have the same node-id */
713 if (slot
->props
.has_node_id
&&
714 slot
->props
.node_id
!= props
->node_id
) {
715 error_setg(errp
, "CPU is already assigned to node-id: %" PRId64
,
716 slot
->props
.node_id
);
720 /* assign slot to node as it's matched '-numa cpu' key */
722 slot
->props
.node_id
= props
->node_id
;
723 slot
->props
.has_node_id
= props
->has_node_id
;
725 if (machine
->numa_state
->hmat_enabled
) {
726 if ((numa_info
[props
->node_id
].initiator
< MAX_NODES
) &&
727 (props
->node_id
!= numa_info
[props
->node_id
].initiator
)) {
728 error_setg(errp
, "The initiator of CPU NUMA node %" PRId64
729 " should be itself", props
->node_id
);
732 numa_info
[props
->node_id
].has_cpu
= true;
733 numa_info
[props
->node_id
].initiator
= props
->node_id
;
738 error_setg(errp
, "no match found");
742 static void smp_parse(MachineState
*ms
, QemuOpts
*opts
)
745 unsigned cpus
= qemu_opt_get_number(opts
, "cpus", 0);
746 unsigned sockets
= qemu_opt_get_number(opts
, "sockets", 0);
747 unsigned cores
= qemu_opt_get_number(opts
, "cores", 0);
748 unsigned threads
= qemu_opt_get_number(opts
, "threads", 0);
750 /* compute missing values, prefer sockets over cores over threads */
751 if (cpus
== 0 || sockets
== 0) {
752 cores
= cores
> 0 ? cores
: 1;
753 threads
= threads
> 0 ? threads
: 1;
755 sockets
= sockets
> 0 ? sockets
: 1;
756 cpus
= cores
* threads
* sockets
;
759 qemu_opt_get_number(opts
, "maxcpus", cpus
);
760 sockets
= ms
->smp
.max_cpus
/ (cores
* threads
);
762 } else if (cores
== 0) {
763 threads
= threads
> 0 ? threads
: 1;
764 cores
= cpus
/ (sockets
* threads
);
765 cores
= cores
> 0 ? cores
: 1;
766 } else if (threads
== 0) {
767 threads
= cpus
/ (cores
* sockets
);
768 threads
= threads
> 0 ? threads
: 1;
769 } else if (sockets
* cores
* threads
< cpus
) {
770 error_report("cpu topology: "
771 "sockets (%u) * cores (%u) * threads (%u) < "
773 sockets
, cores
, threads
, cpus
);
778 qemu_opt_get_number(opts
, "maxcpus", cpus
);
780 if (ms
->smp
.max_cpus
< cpus
) {
781 error_report("maxcpus must be equal to or greater than smp");
785 if (sockets
* cores
* threads
!= ms
->smp
.max_cpus
) {
786 error_report("Invalid CPU topology: "
787 "sockets (%u) * cores (%u) * threads (%u) "
789 sockets
, cores
, threads
,
795 ms
->smp
.cores
= cores
;
796 ms
->smp
.threads
= threads
;
797 ms
->smp
.sockets
= sockets
;
800 if (ms
->smp
.cpus
> 1) {
801 Error
*blocker
= NULL
;
802 error_setg(&blocker
, QERR_REPLAY_NOT_SUPPORTED
, "smp");
803 replay_add_blocker(blocker
);
807 static void machine_class_init(ObjectClass
*oc
, void *data
)
809 MachineClass
*mc
= MACHINE_CLASS(oc
);
811 /* Default 128 MB as guest ram size */
812 mc
->default_ram_size
= 128 * MiB
;
813 mc
->rom_file_has_mr
= true;
814 mc
->smp_parse
= smp_parse
;
816 /* numa node memory size aligned on 8MB by default.
817 * On Linux, each node's border has to be 8MB aligned
819 mc
->numa_mem_align_shift
= 23;
821 object_class_property_add_str(oc
, "kernel",
822 machine_get_kernel
, machine_set_kernel
);
823 object_class_property_set_description(oc
, "kernel",
824 "Linux kernel image file");
826 object_class_property_add_str(oc
, "initrd",
827 machine_get_initrd
, machine_set_initrd
);
828 object_class_property_set_description(oc
, "initrd",
829 "Linux initial ramdisk file");
831 object_class_property_add_str(oc
, "append",
832 machine_get_append
, machine_set_append
);
833 object_class_property_set_description(oc
, "append",
834 "Linux kernel command line");
836 object_class_property_add_str(oc
, "dtb",
837 machine_get_dtb
, machine_set_dtb
);
838 object_class_property_set_description(oc
, "dtb",
839 "Linux kernel device tree file");
841 object_class_property_add_str(oc
, "dumpdtb",
842 machine_get_dumpdtb
, machine_set_dumpdtb
);
843 object_class_property_set_description(oc
, "dumpdtb",
844 "Dump current dtb to a file and quit");
846 object_class_property_add(oc
, "phandle-start", "int",
847 machine_get_phandle_start
, machine_set_phandle_start
,
849 object_class_property_set_description(oc
, "phandle-start",
850 "The first phandle ID we may generate dynamically");
852 object_class_property_add_str(oc
, "dt-compatible",
853 machine_get_dt_compatible
, machine_set_dt_compatible
);
854 object_class_property_set_description(oc
, "dt-compatible",
855 "Overrides the \"compatible\" property of the dt root node");
857 object_class_property_add_bool(oc
, "dump-guest-core",
858 machine_get_dump_guest_core
, machine_set_dump_guest_core
);
859 object_class_property_set_description(oc
, "dump-guest-core",
860 "Include guest memory in a core dump");
862 object_class_property_add_bool(oc
, "mem-merge",
863 machine_get_mem_merge
, machine_set_mem_merge
);
864 object_class_property_set_description(oc
, "mem-merge",
865 "Enable/disable memory merge support");
867 object_class_property_add_bool(oc
, "usb",
868 machine_get_usb
, machine_set_usb
);
869 object_class_property_set_description(oc
, "usb",
870 "Set on/off to enable/disable usb");
872 object_class_property_add_bool(oc
, "graphics",
873 machine_get_graphics
, machine_set_graphics
);
874 object_class_property_set_description(oc
, "graphics",
875 "Set on/off to enable/disable graphics emulation");
877 object_class_property_add_str(oc
, "firmware",
878 machine_get_firmware
, machine_set_firmware
);
879 object_class_property_set_description(oc
, "firmware",
882 object_class_property_add_bool(oc
, "suppress-vmdesc",
883 machine_get_suppress_vmdesc
, machine_set_suppress_vmdesc
);
884 object_class_property_set_description(oc
, "suppress-vmdesc",
885 "Set on to disable self-describing migration");
887 object_class_property_add_link(oc
, "confidential-guest-support",
888 TYPE_CONFIDENTIAL_GUEST_SUPPORT
,
889 offsetof(MachineState
, cgs
),
890 machine_check_confidential_guest_support
,
891 OBJ_PROP_LINK_STRONG
);
892 object_class_property_set_description(oc
, "confidential-guest-support",
893 "Set confidential guest scheme to support");
895 /* For compatibility */
896 object_class_property_add_str(oc
, "memory-encryption",
897 machine_get_memory_encryption
, machine_set_memory_encryption
);
898 object_class_property_set_description(oc
, "memory-encryption",
899 "Set memory encryption object to use");
901 object_class_property_add_str(oc
, "memory-backend",
902 machine_get_memdev
, machine_set_memdev
);
903 object_class_property_set_description(oc
, "memory-backend",
905 "Valid value is ID of hostmem based backend");
908 static void machine_class_base_init(ObjectClass
*oc
, void *data
)
910 MachineClass
*mc
= MACHINE_CLASS(oc
);
911 mc
->max_cpus
= mc
->max_cpus
?: 1;
912 mc
->min_cpus
= mc
->min_cpus
?: 1;
913 mc
->default_cpus
= mc
->default_cpus
?: 1;
915 if (!object_class_is_abstract(oc
)) {
916 const char *cname
= object_class_get_name(oc
);
917 assert(g_str_has_suffix(cname
, TYPE_MACHINE_SUFFIX
));
918 mc
->name
= g_strndup(cname
,
919 strlen(cname
) - strlen(TYPE_MACHINE_SUFFIX
));
920 mc
->compat_props
= g_ptr_array_new();
924 static void machine_initfn(Object
*obj
)
926 MachineState
*ms
= MACHINE(obj
);
927 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
929 container_get(obj
, "/peripheral");
930 container_get(obj
, "/peripheral-anon");
932 ms
->dump_guest_core
= true;
933 ms
->mem_merge
= true;
934 ms
->enable_graphics
= true;
935 ms
->kernel_cmdline
= g_strdup("");
937 if (mc
->nvdimm_supported
) {
938 Object
*obj
= OBJECT(ms
);
940 ms
->nvdimms_state
= g_new0(NVDIMMState
, 1);
941 object_property_add_bool(obj
, "nvdimm",
942 machine_get_nvdimm
, machine_set_nvdimm
);
943 object_property_set_description(obj
, "nvdimm",
944 "Set on/off to enable/disable "
945 "NVDIMM instantiation");
947 object_property_add_str(obj
, "nvdimm-persistence",
948 machine_get_nvdimm_persistence
,
949 machine_set_nvdimm_persistence
);
950 object_property_set_description(obj
, "nvdimm-persistence",
951 "Set NVDIMM persistence"
952 "Valid values are cpu, mem-ctrl");
955 if (mc
->cpu_index_to_instance_props
&& mc
->get_default_cpu_node_id
) {
956 ms
->numa_state
= g_new0(NumaState
, 1);
957 object_property_add_bool(obj
, "hmat",
958 machine_get_hmat
, machine_set_hmat
);
959 object_property_set_description(obj
, "hmat",
960 "Set on/off to enable/disable "
961 "ACPI Heterogeneous Memory Attribute "
965 /* Register notifier when init is done for sysbus sanity checks */
966 ms
->sysbus_notifier
.notify
= machine_init_notify
;
967 qemu_add_machine_init_done_notifier(&ms
->sysbus_notifier
);
969 /* default to mc->default_cpus */
970 ms
->smp
.cpus
= mc
->default_cpus
;
971 ms
->smp
.max_cpus
= mc
->default_cpus
;
977 static void machine_finalize(Object
*obj
)
979 MachineState
*ms
= MACHINE(obj
);
981 g_free(ms
->kernel_filename
);
982 g_free(ms
->initrd_filename
);
983 g_free(ms
->kernel_cmdline
);
986 g_free(ms
->dt_compatible
);
987 g_free(ms
->firmware
);
988 g_free(ms
->device_memory
);
989 g_free(ms
->nvdimms_state
);
990 g_free(ms
->numa_state
);
993 bool machine_usb(MachineState
*machine
)
998 int machine_phandle_start(MachineState
*machine
)
1000 return machine
->phandle_start
;
1003 bool machine_dump_guest_core(MachineState
*machine
)
1005 return machine
->dump_guest_core
;
1008 bool machine_mem_merge(MachineState
*machine
)
1010 return machine
->mem_merge
;
1013 static char *cpu_slot_to_string(const CPUArchId
*cpu
)
1015 GString
*s
= g_string_new(NULL
);
1016 if (cpu
->props
.has_socket_id
) {
1017 g_string_append_printf(s
, "socket-id: %"PRId64
, cpu
->props
.socket_id
);
1019 if (cpu
->props
.has_die_id
) {
1020 g_string_append_printf(s
, "die-id: %"PRId64
, cpu
->props
.die_id
);
1022 if (cpu
->props
.has_core_id
) {
1024 g_string_append_printf(s
, ", ");
1026 g_string_append_printf(s
, "core-id: %"PRId64
, cpu
->props
.core_id
);
1028 if (cpu
->props
.has_thread_id
) {
1030 g_string_append_printf(s
, ", ");
1032 g_string_append_printf(s
, "thread-id: %"PRId64
, cpu
->props
.thread_id
);
1034 return g_string_free(s
, false);
1037 static void numa_validate_initiator(NumaState
*numa_state
)
1040 NodeInfo
*numa_info
= numa_state
->nodes
;
1042 for (i
= 0; i
< numa_state
->num_nodes
; i
++) {
1043 if (numa_info
[i
].initiator
== MAX_NODES
) {
1044 error_report("The initiator of NUMA node %d is missing, use "
1045 "'-numa node,initiator' option to declare it", i
);
1049 if (!numa_info
[numa_info
[i
].initiator
].present
) {
1050 error_report("NUMA node %" PRIu16
" is missing, use "
1051 "'-numa node' option to declare it first",
1052 numa_info
[i
].initiator
);
1056 if (!numa_info
[numa_info
[i
].initiator
].has_cpu
) {
1057 error_report("The initiator of NUMA node %d is invalid", i
);
1063 static void machine_numa_finish_cpu_init(MachineState
*machine
)
1066 bool default_mapping
;
1067 GString
*s
= g_string_new(NULL
);
1068 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1069 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(machine
);
1071 assert(machine
->numa_state
->num_nodes
);
1072 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1073 if (possible_cpus
->cpus
[i
].props
.has_node_id
) {
1077 default_mapping
= (i
== possible_cpus
->len
);
1079 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1080 const CPUArchId
*cpu_slot
= &possible_cpus
->cpus
[i
];
1082 if (!cpu_slot
->props
.has_node_id
) {
1083 /* fetch default mapping from board and enable it */
1084 CpuInstanceProperties props
= cpu_slot
->props
;
1086 props
.node_id
= mc
->get_default_cpu_node_id(machine
, i
);
1087 if (!default_mapping
) {
1088 /* record slots with not set mapping,
1089 * TODO: make it hard error in future */
1090 char *cpu_str
= cpu_slot_to_string(cpu_slot
);
1091 g_string_append_printf(s
, "%sCPU %d [%s]",
1092 s
->len
? ", " : "", i
, cpu_str
);
1095 /* non mapped cpus used to fallback to node 0 */
1099 props
.has_node_id
= true;
1100 machine_set_cpu_numa_node(machine
, &props
, &error_fatal
);
1104 if (machine
->numa_state
->hmat_enabled
) {
1105 numa_validate_initiator(machine
->numa_state
);
1108 if (s
->len
&& !qtest_enabled()) {
1109 warn_report("CPU(s) not present in any NUMA nodes: %s",
1111 warn_report("All CPU(s) up to maxcpus should be described "
1112 "in NUMA config, ability to start up with partial NUMA "
1113 "mappings is obsoleted and will be removed in future");
1115 g_string_free(s
, true);
1118 MemoryRegion
*machine_consume_memdev(MachineState
*machine
,
1119 HostMemoryBackend
*backend
)
1121 MemoryRegion
*ret
= host_memory_backend_get_memory(backend
);
1123 if (memory_region_is_mapped(ret
)) {
1124 error_report("memory backend %s can't be used multiple times.",
1125 object_get_canonical_path_component(OBJECT(backend
)));
1128 host_memory_backend_set_mapped(backend
, true);
1129 vmstate_register_ram_global(ret
);
1133 bool machine_smp_parse(MachineState
*ms
, QemuOpts
*opts
, Error
**errp
)
1135 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
1137 mc
->smp_parse(ms
, opts
);
1139 /* sanity-check smp_cpus and max_cpus against mc */
1140 if (ms
->smp
.cpus
< mc
->min_cpus
) {
1141 error_setg(errp
, "Invalid SMP CPUs %d. The min CPUs "
1142 "supported by machine '%s' is %d",
1144 mc
->name
, mc
->min_cpus
);
1146 } else if (ms
->smp
.max_cpus
> mc
->max_cpus
) {
1147 error_setg(errp
, "Invalid SMP CPUs %d. The max CPUs "
1148 "supported by machine '%s' is %d",
1149 current_machine
->smp
.max_cpus
,
1150 mc
->name
, mc
->max_cpus
);
1156 void machine_run_board_init(MachineState
*machine
)
1158 MachineClass
*machine_class
= MACHINE_GET_CLASS(machine
);
1159 ObjectClass
*oc
= object_class_by_name(machine
->cpu_type
);
1162 /* This checkpoint is required by replay to separate prior clock
1163 reading from the other reads, because timer polling functions query
1164 clock values from the log. */
1165 replay_checkpoint(CHECKPOINT_INIT
);
1167 if (machine
->ram_memdev_id
) {
1169 o
= object_resolve_path_type(machine
->ram_memdev_id
,
1170 TYPE_MEMORY_BACKEND
, NULL
);
1171 machine
->ram
= machine_consume_memdev(machine
, MEMORY_BACKEND(o
));
1174 if (machine
->numa_state
) {
1175 numa_complete_configuration(machine
);
1176 if (machine
->numa_state
->num_nodes
) {
1177 machine_numa_finish_cpu_init(machine
);
1181 /* If the machine supports the valid_cpu_types check and the user
1182 * specified a CPU with -cpu check here that the user CPU is supported.
1184 if (machine_class
->valid_cpu_types
&& machine
->cpu_type
) {
1187 for (i
= 0; machine_class
->valid_cpu_types
[i
]; i
++) {
1188 if (object_class_dynamic_cast(oc
,
1189 machine_class
->valid_cpu_types
[i
])) {
1190 /* The user specificed CPU is in the valid field, we are
1197 if (!machine_class
->valid_cpu_types
[i
]) {
1198 /* The user specified CPU is not valid */
1199 error_report("Invalid CPU type: %s", machine
->cpu_type
);
1200 error_printf("The valid types are: %s",
1201 machine_class
->valid_cpu_types
[0]);
1202 for (i
= 1; machine_class
->valid_cpu_types
[i
]; i
++) {
1203 error_printf(", %s", machine_class
->valid_cpu_types
[i
]);
1211 /* Check if CPU type is deprecated and warn if so */
1213 if (cc
&& cc
->deprecation_note
) {
1214 warn_report("CPU model %s is deprecated -- %s", machine
->cpu_type
,
1215 cc
->deprecation_note
);
1220 * With confidential guests, the host can't see the real
1221 * contents of RAM, so there's no point in it trying to merge
1224 machine_set_mem_merge(OBJECT(machine
), false, &error_abort
);
1227 * Virtio devices can't count on directly accessing guest
1228 * memory, so they need iommu_platform=on to use normal DMA
1229 * mechanisms. That requires also disabling legacy virtio
1230 * support for those virtio pci devices which allow it.
1232 object_register_sugar_prop(TYPE_VIRTIO_PCI
, "disable-legacy",
1234 object_register_sugar_prop(TYPE_VIRTIO_DEVICE
, "iommu_platform",
1238 accel_init_interfaces(ACCEL_GET_CLASS(machine
->accelerator
));
1239 machine_class
->init(machine
);
1240 phase_advance(PHASE_MACHINE_INITIALIZED
);
1243 static NotifierList machine_init_done_notifiers
=
1244 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers
);
1246 void qemu_add_machine_init_done_notifier(Notifier
*notify
)
1248 notifier_list_add(&machine_init_done_notifiers
, notify
);
1249 if (phase_check(PHASE_MACHINE_READY
)) {
1250 notify
->notify(notify
, NULL
);
1254 void qemu_remove_machine_init_done_notifier(Notifier
*notify
)
1256 notifier_remove(notify
);
1259 void qdev_machine_creation_done(void)
1261 cpu_synchronize_all_post_init();
1263 if (current_machine
->boot_once
) {
1264 qemu_boot_set(current_machine
->boot_once
, &error_fatal
);
1265 qemu_register_reset(restore_boot_order
, g_strdup(current_machine
->boot_order
));
1269 * ok, initial machine setup is done, starting from now we can
1270 * only create hotpluggable devices
1272 phase_advance(PHASE_MACHINE_READY
);
1273 qdev_assert_realized_properly();
1275 /* TODO: once all bus devices are qdevified, this should be done
1276 * when bus is created by qdev.c */
1278 * TODO: If we had a main 'reset container' that the whole system
1279 * lived in, we could reset that using the multi-phase reset
1280 * APIs. For the moment, we just reset the sysbus, which will cause
1281 * all devices hanging off it (and all their child buses, recursively)
1282 * to be reset. Note that this will *not* reset any Device objects
1283 * which are not attached to some part of the qbus tree!
1285 qemu_register_reset(resettable_cold_reset_fn
, sysbus_get_default());
1287 notifier_list_notify(&machine_init_done_notifiers
, NULL
);
1289 if (rom_check_and_register_reset() != 0) {
1295 /* This checkpoint is required by replay to separate prior clock
1296 reading from the other reads, because timer polling functions query
1297 clock values from the log. */
1298 replay_checkpoint(CHECKPOINT_RESET
);
1299 qemu_system_reset(SHUTDOWN_CAUSE_NONE
);
1300 register_global_state();
1303 static const TypeInfo machine_info
= {
1304 .name
= TYPE_MACHINE
,
1305 .parent
= TYPE_OBJECT
,
1307 .class_size
= sizeof(MachineClass
),
1308 .class_init
= machine_class_init
,
1309 .class_base_init
= machine_class_base_init
,
1310 .instance_size
= sizeof(MachineState
),
1311 .instance_init
= machine_initfn
,
1312 .instance_finalize
= machine_finalize
,
1315 static void machine_register_types(void)
1317 type_register_static(&machine_info
);
1320 type_init(machine_register_types
)