| commit | 9df5a46632dca802f382ae61d2d3d0fdbfb185a5 | |
| author | Tom Musta <tommusta@gmail.com> | |
| Tue, 15 Apr 2014 17:21:12 +0000 (15 12:21 -0500) | ||
| committer | Alexander Graf <agraf@suse.de> | |
| Mon, 16 Jun 2014 11:24:27 +0000 (16 13:24 +0200) | ||
| tree | 59d991b688bef7d0b66f0e6ac0386b1ef3b6c631 | treesnapshot (tar.gz zip) |
| parent | b26696b519f853c9844e5154858e583600ee3cdc | commitdiff |
target-ppc: Eliminate Magic Number MSR Masks
Use MSR mnemonics from cpu.h instead of magic numbers for the CPUPPCState.msr_mask
initialization.
There is one bit in the 401x2 (and subsequent) model that I could not find any
documentation for. It is open coded at little endian bit position 20:
pcc->msr_mask = (1ull << 20) |
(1ull << MSR_KEY) |
(1ull << MSR_POW) |
(1ull << MSR_CE) |
...
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Use MSR mnemonics from cpu.h instead of magic numbers for the CPUPPCState.msr_mask
initialization.
There is one bit in the 401x2 (and subsequent) model that I could not find any
documentation for. It is open coded at little endian bit position 20:
pcc->msr_mask = (1ull << 20) |
(1ull << MSR_KEY) |
(1ull << MSR_POW) |
(1ull << MSR_CE) |
...
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
| target-ppc/translate_init.c | diffblobblamehistory |