| commit | 81907a582901671c15be36a63b5063f88f3487e2 | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Tue, 23 Feb 2016 15:36:44 +0000 (23 15:36 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 26 Feb 2016 15:09:41 +0000 (26 15:09 +0000) | ||
| tree | aedfb83c41058e9e02c32d99ffe6c388207ebeb2 | treesnapshot (tar.gz zip) |
| parent | 58ae2d1f037fae1d90eed4522053a85d79edfbec | commitdiff |
target-arm: In v8, make illegal AArch32 mode changes set PSTATE.IL
In v8, the illegal mode changes which are UNPREDICTABLE in v7 are
given architected behaviour:
* the mode field is unchanged
* PSTATE.IL is set (so any subsequent instructions will UNDEF)
* any other CPSR fields are written to as normal
This is pretty much the same behaviour we picked for our
UNPREDICTABLE handling, with the exception that for v8 we
need to set the IL bit.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
Message-id: 1455556977-3644-10-git-send-email-peter.maydell@linaro.org
In v8, the illegal mode changes which are UNPREDICTABLE in v7 are
given architected behaviour:
* the mode field is unchanged
* PSTATE.IL is set (so any subsequent instructions will UNDEF)
* any other CPSR fields are written to as normal
This is pretty much the same behaviour we picked for our
UNPREDICTABLE handling, with the exception that for v8 we
need to set the IL bit.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
Message-id: 1455556977-3644-10-git-send-email-peter.maydell@linaro.org
| target-arm/helper.c | diffblobblamehistory |