| commit | 6b9680bb5826dcf0ead42bafb62946f472466d63 | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Wed, 2 May 2012 16:49:40 +0000 (2 16:49 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Tue, 19 Jun 2012 13:24:44 +0000 (19 13:24 +0000) | ||
| tree | 8ca295252fa148d6222adef9592e778a2d3d94e4 | treesnapshot (tar.gz zip) |
| parent | 306a571a2d75e32cd2eae5486c2714b7b7792a63 | commitdiff |
hw/arm_gic: Make CPU target registers RAZ/WI on uniprocessor
The GIC spec says that the CPU target registers should RAZ/WI
for uniprocessor implementations. Implement this, which also
conveniently lets us drop an NVIC ifdef.
Annoyingly, the 11MPCore's GIC is the odd one out, since
it always has these registers, even in uniprocessor configs.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The GIC spec says that the CPU target registers should RAZ/WI
for uniprocessor implementations. Implement this, which also
conveniently lets us drop an NVIC ifdef.
Annoyingly, the 11MPCore's GIC is the odd one out, since
it always has these registers, even in uniprocessor configs.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/arm_gic.c | diffblobblamehistory |