| commit | 4681867544f04f752bd98f39c3055493c80ea316 | |
| author | David Gibson <david@gibson.dropbear.id.au> | |
| Fri, 27 Feb 2015 06:04:35 +0000 (27 17:04 +1100) | ||
| committer | Paolo Bonzini <pbonzini@redhat.com> | |
| Fri, 27 Feb 2015 14:17:35 +0000 (27 15:17 +0100) | ||
| tree | eb8359510b32e9979879b42ce6926b3511b2ed76 | treesnapshot (tar.gz zip) |
| parent | 57fe6a6e4a050f639ac3d2f7c32b4cd3bcde3978 | commitdiff |
Add specific config options for PCI-E bridges
The i82801b11, ioh3420 and xio3130 PCI Express devices are currently
included in the build unconditionally.
While they could theoretically appear on any target platform with PCI-E,
they're pretty unlikely to appear on platforms that aren't Intel derived.
Therefore, to avoid presenting unlikely-to-be-relevant devices to the user,
add config options to enable these components, and enable them by default
only on x86 and arm platforms.
(Note that this patch does include these for aarch64, via its inclusion of
arm-softmmu.mak).
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-Id: <1425017077-18487-2-git-send-email-david@gibson.dropbear.id.au>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
The i82801b11, ioh3420 and xio3130 PCI Express devices are currently
included in the build unconditionally.
While they could theoretically appear on any target platform with PCI-E,
they're pretty unlikely to appear on platforms that aren't Intel derived.
Therefore, to avoid presenting unlikely-to-be-relevant devices to the user,
add config options to enable these components, and enable them by default
only on x86 and arm platforms.
(Note that this patch does include these for aarch64, via its inclusion of
arm-softmmu.mak).
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-Id: <1425017077-18487-2-git-send-email-david@gibson.dropbear.id.au>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>