| 10 days ago | Luc Michel | hw/sd/sdcard: Implement eMMC sleep state (CMD5) Signed-off-by: Luc Michel <luc.michel@amd.com> |
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| 2024-02-15 | Luc Michel | hw/arm/smmuv3: add support for stage 1 access fault Signed-off-by: Luc Michel <luc.michel@amd.com> Message-id: 20240213082211.3330400-1-luc.michel@amd.com |
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| 2023-10-27 | Luc Michel | hw/net/cadence_gem: enforce 32 bits variable size for CRC Signed-off-by: Luc Michel <luc.michel@amd.com> ...id: 20231017194422.4124691-12-luc.michel@amd.com |
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| 2023-10-27 | Luc Michel | hw/net/cadence_gem: perform PHY access on write only Signed-off-by: Luc Michel <luc.michel@amd.com> ...id: 20231017194422.4124691-11-luc.michel@amd.com |
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| 2023-10-27 | Luc Michel | hw/net/cadence_gem: use FIELD to describe PHYMNTNC... Signed-off-by: Luc Michel <luc.michel@amd.com> ...id: 20231017194422.4124691-10-luc.michel@amd.com |
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| 2023-10-27 | Luc Michel | hw/net/cadence_gem: use FIELD to describe DESCONF6... Signed-off-by: Luc Michel <luc.michel@amd.com> Message-id: 20231017194422.4124691-9-luc.michel@amd.com |
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| 2023-10-27 | Luc Michel | hw/net/cadence_gem: use FIELD to describe IRQ register... Signed-off-by: Luc Michel <luc.michel@amd.com> Message-id: 20231017194422.4124691-8-luc.michel@amd.com |
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| 2023-10-27 | Luc Michel | hw/net/cadence_gem: use FIELD to describe [TX|RX]STATUS... Signed-off-by: Luc Michel <luc.michel@amd.com> Message-id: 20231017194422.4124691-7-luc.michel@amd.com |
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| 2023-10-27 | Luc Michel | hw/net/cadence_gem: use FIELD to describe DMACFG register... Signed-off-by: Luc Michel <luc.michel@amd.com> Message-id: 20231017194422.4124691-6-luc.michel@amd.com |
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| 2023-10-27 | Luc Michel | hw/net/cadence_gem: use FIELD to describe NWCFG register... Signed-off-by: Luc Michel <luc.michel@amd.com> Message-id: 20231017194422.4124691-5-luc.michel@amd.com |
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| 2023-10-27 | Luc Michel | hw/net/cadence_gem: use FIELD to describe NWCTRL register... Signed-off-by: Luc Michel <luc.michel@amd.com> Message-id: 20231017194422.4124691-4-luc.michel@amd.com |
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| 2023-10-27 | Luc Michel | hw/net/cadence_gem: use FIELD for screening registers Signed-off-by: Luc Michel <luc.michel@amd.com> Message-id: 20231017194422.4124691-3-luc.michel@amd.com |
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| 2023-10-27 | Luc Michel | hw/net/cadence_gem: use REG32 macro for register definitions Signed-off-by: Luc Michel <luc.michel@amd.com> Message-id: 20231017194422.4124691-2-luc.michel@amd.com |
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