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hw/char/sh_serial: Embed QEMUTimer in state struct
2021-10-30 BALATON Zoltanhw/char/sh_serial: Embed QEMUTimer in state struct
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-30 BALATON Zoltanhw/char/sh_serial: Rename type sh_serial_state to SHSerialState
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-30 BALATON Zoltanhw/char/sh_serial: Do not abort on invalid access
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-30 BALATON Zoltanhw/sh4/r2d: Use error_report instead of fprintf to...
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-30 BALATON Zoltanhw/sh4: Change debug printfs to traces
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-30 BALATON Zoltanhw/sh4: Fix typos in a comment
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-30 BALATON Zoltanhw/sh4: Coding style: Remove unnecessary casts
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-30 BALATON Zoltanhw/sh4: Coding style: Add missing braces
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-30 BALATON Zoltanhw/sh4: Coding style: White space fixes
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-30 BALATON Zoltanhw/sh4: Coding style: Fix multi-line comments
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-30 BALATON Zoltanhw/sh4: Coding style: Remove tabs
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-17 BALATON Zoltanvia-ide: Avoid using isa_get_irq()
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-17 BALATON Zoltanvt82c686: Add a method to VIA_ISA to raise ISA interrupts
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-17 BALATON Zoltanvt82c686: Move common code to via_isa_realize
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-17 BALATON Zoltanvia-ide: Set user_creatable to false
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-17 Philippe Mathieu... target/mips: Remove unused TCG temporary in gen_mipsdsp_acci...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211014224551.2204949-1-f4bug@amsat.org>
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2021-10-17 Philippe Mathieu... target/mips: Fix DEXTRV_S.H DSP opcode
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211013215652.1764551-1-f4bug@amsat.org>
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2021-10-17 Philippe Mathieu... target/mips: Use tcg_constant_tl() in gen_compute_compact_br...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211003175743.3738710-9-f4bug@amsat.org>
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2021-10-17 Philippe Mathieu... target/mips: Use explicit extract32() calls in gen_msa_i5()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211003175743.3738710-7-f4bug@amsat.org>
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2021-10-17 Philippe Mathieu... target/mips: Use tcg_constant_i32() in gen_msa_3rf()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211003175743.3738710-6-f4bug@amsat.org>
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2021-10-17 Philippe Mathieu... target/mips: Use tcg_constant_i32() in gen_msa_2r()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211003175743.3738710-5-f4bug@amsat.org>
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2021-10-17 Philippe Mathieu... target/mips: Use tcg_constant_i32() in gen_msa_2rf()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211003175743.3738710-4-f4bug@amsat.org>
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2021-10-17 Philippe Mathieu... target/mips: Use tcg_constant_i32() in gen_msa_elm_df()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211003175743.3738710-3-f4bug@amsat.org>
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2021-10-17 Philippe Mathieu... target/mips: Remove unused register from MSA 2R/2RF...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211003175743.3738710-2-f4bug@amsat.org>
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2021-10-17 Jiaxun Yanghw/mips/boston: Add FDT generator
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-17 Jiaxun Yanghw/mips/boston: Allow loading elf kernel and dtb
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-17 Jiaxun Yanghw/mips/boston: Massage memory map information
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-10-17 Philippe Mathieu... target/mips: Check nanoMIPS DSP MULT[U] accumulator...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigend...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210818164321.2474534-6-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Store CP0_Config0 in DisasContext
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210818164321.2474534-5-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Replace GET_LMASK64() macro by get_lmask...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210818215517.2560994-4-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Replace GET_LMASK() macro by get_lmask...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210818215517.2560994-3-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Call cpu_is_bigendian & inline GET_OFFSET...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210818215517.2560994-2-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Define gen_helper() macros in translate.h
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210816205107.2051495-9-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Use tcg_constant_i32() in generate_exception_err()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210816205107.2051495-8-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Inline gen_helper_0e0i()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210816205107.2051495-7-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Inline gen_helper_1e1i() call in op_ld_INSN...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210816205107.2051495-6-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Simplify gen_helper() macros by using...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210816205107.2051495-5-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Use tcg_constant_i32() in gen_helper_0e2i()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210816205107.2051495-4-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Remove gen_helper_1e2i()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210816205107.2051495-3-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Remove gen_helper_0e3i()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210816205107.2051495-2-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Remove duplicated check_cp1_enabled()...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210816001031.1720432-1-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Allow Loongson 3A1000 to use up to 48...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210813110149.1432692-3-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Document Loongson-3A CPU definitions
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210813110149.1432692-2-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Convert Vr54xx MSA* opcodes to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210808173018.90960-8-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Convert Vr54xx MUL* opcodes to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210808173018.90960-7-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Convert Vr54xx MACC* opcodes to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210808173018.90960-6-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Introduce decodetree structure for NEC...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210801235926.3178085-3-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201120210844.2625602-14-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Extract NEC Vr54xx helper definitions
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201120210844.2625602-15-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Introduce generic TRANS() macro for decodetree...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210808173018.90960-2-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Rename 'rtype' as 'r'
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210801234202.3167676-5-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Merge 32-bit/64-bit Release6 decodetree...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210801234202.3167676-4-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Decode vendor extensions before MIPS ISAs
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210801234202.3167676-3-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Simplify PREF opcode
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210801234202.3167676-2-f4bug@amsat.org>
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2021-08-25 Philippe Mathieu... target/mips: Remove JR opcode unused arguments
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210730225507.2642827-1-f4bug@amsat.org>
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2021-08-03 Philippe Mathieu... hw/sd/sdcard: Fix assertion accessing out-of-range...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210802235524.3417739-3-f4bug@amsat.org>
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2021-08-03 Philippe Mathieu... hw/sd/sdcard: Document out-of-range addresses for SEND_WRITE...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210802235524.3417739-2-f4bug@amsat.org>
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2021-07-12 Philippe Mathieu... hw/sd/sdcard: Check for valid address range in SEND_WRITE_PR...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210702155900.148665-4-f4bug@amsat.org>
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2021-07-12 Philippe Mathieu... hw/sd/sdcard: Extract address_in_range() helper, log...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210624142209.1193073-3-f4bug@amsat.org>
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2021-07-12 Philippe Mathieu... hw/sd/sdcard: When card is in wrong state, log which...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210624142209.1193073-2-f4bug@amsat.org>
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2021-07-11 Mark Cave-Aylanddp8393x: don't force 32-bit register access
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... dp8393x: Rewrite dp8393x_get() / dp8393x_put()
Co-developed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210710174954.2577195-8-f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... dp8393x: Store CAM registers as 16-bit
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210710174954.2577195-5-f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... dp8393x: Replace 0x40 magic value by SONIC_REG_COUNT...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210710174954.2577195-3-f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... dp8393x: Replace address_space_rw(is_write=1) by address_spa...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210710174954.2577195-2-f4bug@amsat.org>
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2021-07-11 Mark Cave-Aylanddp8393x: fix CAM descriptor entry index
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... target/mips: Rewrite UHI errno_mips() using switch...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210706130723.1178961-1-f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... target/mips/tx79: Introduce SQ opcode (Store Quadword)
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210214175912.732946-27-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... target/mips/tx79: Introduce LQ opcode (Load Quadword)
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210214175912.732946-26-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... target/mips/tx79: Introduce PROT3W opcode (Parallel...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210214175912.732946-25-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... target/mips/tx79: Introduce PPACW opcode (Parallel...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210214175912.732946-22-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... target/mips/tx79: Introduce PCGT* (Parallel Compare...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210309145653.743937-15-f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... target/mips/tx79: Introduce PCEQ* opcodes (Parallel...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210309145653.743937-14-f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... target/mips/tx79: Introduce PEXTL[BHW] opcodes (Parallel...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210309145653.743937-13-f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... target/mips/tx79: Introduce PEXTUW (Parallel Extend...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210309145653.743937-12-f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... target/mips/tx79: Introduce PSUB* opcodes (Parallel...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <820210309145653.743937-11-f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... target/mips/tx79: Introduce PAND/POR/PXOR/PNOR opcodes...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210214175912.732946-16-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... hw/pci-host/raven: Add PCI_IO_BASE_ADDR definition
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210417103028.601124-6-f4bug@amsat.org>
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2021-07-11 Philippe Mathieu... hw/pci-host: Rename Raven ASIC PCI bridge as raven.c
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210417103028.601124-5-f4bug@amsat.org>
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2021-07-02 Philippe Mathieu... hw/mips/jazz: Map the UART devices unconditionally
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210629053704.2584504-1-f4bug@amsat.org>
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2021-07-02 Mark Cave-Aylandhw/mips/jazz: specify correct endian for dp8393x device
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-02 Mark Cave-Aylandhw/m68k/q800: fix PROM checksum and MAC address storage
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-02 Mark Cave-Aylandqemu/bitops.h: add bitrev8 implementation
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-02 Mark Cave-Aylanddp8393x: remove onboard PROM containing MAC address...
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-02 Mark Cave-Aylandhw/m68k/q800: move PROM and checksum calculation from...
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-02 Mark Cave-Aylandhw/mips/jazz: move PROM and checksum calculation from...
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-02 Mark Cave-Aylanddp8393x: convert to trace-events
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-02 Mark Cave-Aylanddp8393x: checkpatch fixes
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-02 Mark Cave-Aylandg364fb: add VMStateDescription for G364SysBusState
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-07-02 Mark Cave-Aylandg364fb: use RAM memory region for framebuffer
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 commit | commitdiff | tree
2021-07-02 Philippe Mathieu... tests/acceptance: Test Linux on the Fuloong 2E machine
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210624202747.1433023-5-f4bug@amsat.org>
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2021-07-02 Philippe Mathieu... hw/pci-host/bonito: Allow PCI config accesses smaller...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210624202747.1433023-4-f4bug@amsat.org>
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2021-07-02 Philippe Mathieu... hw/pci-host/bonito: Trace PCI config accesses smaller...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210624202747.1433023-3-f4bug@amsat.org>
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2021-07-02 Philippe Mathieu... target/mips: Extract nanoMIPS ISA translation routines
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201120210844.2625602-13-f4bug@amsat.org>
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2021-07-02 Philippe Mathieu... target/mips: Extract the microMIPS ISA translation...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201120210844.2625602-12-f4bug@amsat.org>
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2021-07-02 Philippe Mathieu... target/mips: Extract Code Compaction ASE translation...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201120210844.2625602-10-f4bug@amsat.org>
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2021-07-02 Philippe Mathieu... target/mips: Add declarations for generic TCG helpers
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210617174907.2904067-2-f4bug@amsat.org>
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2021-06-24 Philippe Mathieu... target/mips: Merge msa32/msa64 decodetree definitions
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210617174636.2902654-3-f4bug@amsat.org>
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2021-06-24 Philippe Mathieu... target/mips: Remove pointless gen_msa()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210617174636.2902654-2-f4bug@amsat.org>
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armbru's QEMU hackery