target/mips/mxu: Add Q8ADDE Q8ACCE D8SUM D8SUMC instructions
commiteb79951ab638ba84ef424a8f7c0929cd4a5ea53d
authorSiarhei Volkau <lis8215@gmail.com>
Thu, 8 Jun 2023 10:42:08 +0000 (8 13:42 +0300)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Mon, 10 Jul 2023 21:33:38 +0000 (10 23:33 +0200)
tree2f9440682622b42d7a84ad45dc5d5003da4a0d52
parent6191a807fb865804c08b60b06393f25673f2fb64
target/mips/mxu: Add Q8ADDE Q8ACCE D8SUM D8SUMC instructions

These instructions are all dual 8-bit addition/subtraction in
various combinations. Most instructions are grouped in pool14,
see the opcode organization in the file.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Message-Id: <20230608104222.1520143-20-lis8215@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
target/mips/tcg/mxu_translate.c