| commit | d1b6ded4f72bab624e6366121443a5f0a856ceda | |
| author | Siarhei Volkau <lis8215@gmail.com> | |
| Thu, 8 Jun 2023 10:42:17 +0000 (8 13:42 +0300) | ||
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | |
| Mon, 10 Jul 2023 21:33:38 +0000 (10 23:33 +0200) | ||
| tree | 0d3702455b118fa87042289e5d8877fc641654a7 | treesnapshot (tar.gz zip) |
| parent | 07c92895d758a9d2f77d555b92ae18149c14680d | commitdiff |
target/mips/mxu: Add S32/D16/Q8- MOVZ/MOVN instructions
These instructions are:
- single 32-bit
- dual 16-bit packed
- quad 8-bit packed
conditional moves.
They are grouped in pool20 in the source code.
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Message-Id: <20230608104222.1520143-29-lis8215@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
These instructions are:
- single 32-bit
- dual 16-bit packed
- quad 8-bit packed
conditional moves.
They are grouped in pool20 in the source code.
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Message-Id: <20230608104222.1520143-29-lis8215@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| target/mips/tcg/mxu_translate.c | diffblobblamehistory |