target/loongarch: Implement vsll vsrl vsra vrotr
commitb281d6961d5f31d1bbcfc2cd50d2a7237ee9d062
authorSong Gao <gaosong@loongson.cn>
Thu, 4 May 2023 12:27:48 +0000 (4 20:27 +0800)
committerSong Gao <gaosong@loongson.cn>
Sat, 6 May 2023 03:19:47 +0000 (6 11:19 +0800)
treebfd3bdb8645ef968b731c4eb2c5f3a9d71608c87
parentf205a539f6b911f96f1010361f23a77d9c9f94ca
target/loongarch: Implement vsll vsrl vsra vrotr

This patch includes:
- VSLL[I].{B/H/W/D};
- VSRL[I].{B/H/W/D};
- VSRA[I].{B/H/W/D};
- VROTR[I].{B/H/W/D}.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-23-gaosong@loongson.cn>
target/loongarch/disas.c
target/loongarch/insn_trans/trans_lsx.c.inc
target/loongarch/insns.decode