| commit | 9e51e0cd4bac9dd94f593d66497f635edd871d2e | |
| author | Siarhei Volkau <lis8215@gmail.com> | |
| Thu, 8 Jun 2023 10:42:04 +0000 (8 13:42 +0300) | ||
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | |
| Mon, 10 Jul 2023 21:33:38 +0000 (10 23:33 +0200) | ||
| tree | f62e26c5445381d5592ff82b09a792a6b91f95e8 | treesnapshot (tar.gz zip) |
| parent | a9bfd80bd48f43ce333e8668f1b26b5cfd2d1ac2 | commitdiff |
target/mips/mxu: Add D32ADD instruction
The instruction adds/subtracts two 32-bit values in XRb and XRc.
Placing results in XRa and XRd and updates carry bits for each
path in the MXU control register.
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Message-Id: <20230608104222.1520143-16-lis8215@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
The instruction adds/subtracts two 32-bit values in XRb and XRc.
Placing results in XRa and XRd and updates carry bits for each
path in the MXU control register.
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Message-Id: <20230608104222.1520143-16-lis8215@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| target/mips/tcg/mxu_translate.c | diffblobblamehistory |