| commit | 49eba52a52fec563af83a77d5ec5c59dba412127 | |
| author | Jiaxun Yang <jiaxun.yang@flygoat.com> | |
| Wed, 8 May 2024 13:06:49 +0000 (8 14:06 +0100) | ||
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | |
| Wed, 19 Jun 2024 10:42:03 +0000 (19 12:42 +0200) | ||
| tree | e2528608c1386ba7057d74ebea2c4c51ea670eaf | treesnapshot (tar.gz zip) |
| parent | 5f82fb2a3a71bb510b3e1b7229929d468c01740a | commitdiff |
hw/intc/loongson_ipi: Provide per core MMIO address spaces
The real IPI hardware have dedicated MMIO registers mapped into
memory address space for every core. This is not used by LoongArch
guest software but it is essential for CPU without IOCSR such as
Loongson-3A1000.
Implement it with existing infrastructure.
Acked-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-ID: <20240605-loongson3-ipi-v3-2-ddd2c0e03fa3@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
The real IPI hardware have dedicated MMIO registers mapped into
memory address space for every core. This is not used by LoongArch
guest software but it is essential for CPU without IOCSR such as
Loongson-3A1000.
Implement it with existing infrastructure.
Acked-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-ID: <20240605-loongson3-ipi-v3-2-ddd2c0e03fa3@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| hw/intc/loongson_ipi.c | diffblobblamehistory | |
| include/hw/intc/loongson_ipi.h | diffblobblamehistory |