target/arm: Look up ARMCPRegInfo at runtime
commit3b07a936d3bfe97b07ddffcfbb532985a88033dd
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 6 Jan 2023 19:44:51 +0000 (6 11:44 -0800)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 23 Jan 2023 13:32:38 +0000 (23 13:32 +0000)
tree11bf566db142db5e6c3ab8e7a333f21ff252ba73
parent0371fa90a1b65b1536b3ff7ba583e4119c363eea
target/arm: Look up ARMCPRegInfo at runtime

Do not encode the pointer as a constant in the opcode stream.
This pointer is specific to the cpu that first generated the
translation, which runs into problems with both hot-pluggable
cpus and user-only threads, as cpus are removed. It's also a
potential correctness issue in the theoretical case of a
slightly-heterogenous system, because if CPU 0 generates a
TB and then CPU 1 executes it, CPU 1 will end up using CPU 0's
hash table, which might have a wrong set of registers in it.
(All our current systems are either completely homogenous,
M-profile, or have CPUs sufficiently different that they
wouldn't be sharing TBs anyway because the differences would
show up in the TB flags, so the correctness issue is only
theoretical, not practical.)

Perform the lookup in either helper_access_check_cp_reg,
or a new helper_lookup_cp_reg.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230106194451.1213153-3-richard.henderson@linaro.org
[PMM: added note in commit message about correctness issue]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/helper.h
target/arm/op_helper.c
target/arm/translate-a64.c
target/arm/translate.c
target/arm/translate.h