target/arm: Catch illegal-exception-return from EL3 with bad NSE/NS
commit35aa6715ddcd9748bae5bc01563331e8eae8d7cf
authorPeter Maydell <peter.maydell@linaro.org>
Thu, 31 Aug 2023 08:45:17 +0000 (31 09:45 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 31 Aug 2023 08:45:17 +0000 (31 09:45 +0100)
tree1939765a951a292aba691ad0afccd1946c290331
parent12517bc978e62ce19df0160ad2ef229169a567b2
target/arm: Catch illegal-exception-return from EL3 with bad NSE/NS

The architecture requires (R_TYTWB) that an attempt to return from EL3
when SCR_EL3.{NSE,NS} are {1,0} is an illegal exception return. (This
enforces that the CPU can't ever be executing below EL3 with the
NSE,NS bits indicating an invalid security state.)

We were missing this check; add it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230807150618.101357-1-peter.maydell@linaro.org
target/arm/tcg/helper-a64.c