| commit | 256f06668a7764a3bab581cd3b548964e3861189 | |
| author | BALATON Zoltan <balaton@eik.bme.hu> | |
| Wed, 5 Jul 2023 20:12:46 +0000 (5 22:12 +0200) | ||
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | |
| Fri, 7 Jul 2023 07:47:49 +0000 (7 04:47 -0300) | ||
| tree | 4a9d551412dd1cc345028f605b979f90858b50e7 | treesnapshot (tar.gz zip) |
| parent | 339d13ce57a33d1536b0bae15ee633af11e6b116 | commitdiff |
ppc440: Add cpu link property to PCIe controller model
The PCIe controller model uses PPC DCRs but cannot be modeled with
TYPE_PPC4xx_DCR_DEVICE as it derives from TYPE_PCIE_HOST_BRIDGE. Add a
cpu link property to it similar to other DCR devices to allow
registering DCRs from the device model.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <a79796654deaa81a6a1c71efc874e4d88c4cafd4.1688586835.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
The PCIe controller model uses PPC DCRs but cannot be modeled with
TYPE_PPC4xx_DCR_DEVICE as it derives from TYPE_PCIE_HOST_BRIDGE. Add a
cpu link property to it similar to other DCR devices to allow
registering DCRs from the device model.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <a79796654deaa81a6a1c71efc874e4d88c4cafd4.1688586835.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| hw/ppc/ppc440_uc.c | diffblobblamehistory |