| commit | 1980fa0a58ec8deada197e399a1c3c3b78c39e09 | |
| author | Siarhei Volkau <lis8215@gmail.com> | |
| Thu, 8 Jun 2023 10:41:51 +0000 (8 13:41 +0300) | ||
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | |
| Mon, 10 Jul 2023 21:33:38 +0000 (10 23:33 +0200) | ||
| tree | 3729f8e54a2f2fe2fed60f61088d72cb2a88be6a | treesnapshot (tar.gz zip) |
| parent | 59db94656d21e17a365af2e3b8f7e66b60e22810 | commitdiff |
target/mips: Add support of two XBurst CPUs
XBurstR1 - is the MIPS32R1 CPU which aims to cover all Ingenic SoCs
older than JZ4770 and some newer.
XBurstR2 - is the MIPS32R2 CPU which aims to cover all Ingenic SoCs
starting from to JZ4770.
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Message-Id: <20230608104222.1520143-3-lis8215@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
XBurstR1 - is the MIPS32R1 CPU which aims to cover all Ingenic SoCs
older than JZ4770 and some newer.
XBurstR2 - is the MIPS32R2 CPU which aims to cover all Ingenic SoCs
starting from to JZ4770.
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Message-Id: <20230608104222.1520143-3-lis8215@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| target/mips/cpu-defs.c.inc | diffblobblamehistory |