target/mips: Fix TX79 LQ/SQ opcodes
commit18f86aecd6a1bea0f78af14587a684ad966d8d3a
authorPhilippe Mathieu-Daudé <philmd@linaro.org>
Thu, 14 Sep 2023 09:02:41 +0000 (14 11:02 +0200)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Tue, 7 Nov 2023 11:13:28 +0000 (7 12:13 +0100)
tree9cc1b7f8067a96c6bdc20b851c8a804363574248
parent04591b3ddd9a96b9298a1dd437a6464ab55e62ee
target/mips: Fix TX79 LQ/SQ opcodes

The base register address offset is *signed*.

Cc: qemu-stable@nongnu.org
Fixes: aaaa82a9f9 ("target/mips/tx79: Introduce LQ opcode (Load Quadword)")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914090447.12557-1-philmd@linaro.org>
target/mips/tcg/tx79.decode