2 * vfio based device assignment support
4 * Copyright Red Hat, Inc. 2012
7 * Alex Williamson <alex.williamson@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
12 * Based on qemu-kvm device-assignment:
13 * Adapted for KVM by Qumranet.
14 * Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com)
15 * Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com)
16 * Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com)
17 * Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com)
18 * Copyright (C) 2008, IBM, Muli Ben-Yehuda (muli@il.ibm.com)
21 #include "qemu/osdep.h"
22 #include <linux/vfio.h>
23 #include <sys/ioctl.h>
26 #include "hw/pci/msi.h"
27 #include "hw/pci/msix.h"
28 #include "hw/pci/pci_bridge.h"
29 #include "hw/qdev-properties.h"
30 #include "migration/vmstate.h"
31 #include "qemu/error-report.h"
32 #include "qemu/main-loop.h"
33 #include "qemu/module.h"
34 #include "qemu/option.h"
35 #include "qemu/range.h"
36 #include "qemu/units.h"
37 #include "sysemu/kvm.h"
38 #include "sysemu/runstate.h"
39 #include "sysemu/sysemu.h"
42 #include "qapi/error.h"
43 #include "migration/blocker.h"
45 #define TYPE_VFIO_PCI "vfio-pci"
46 #define PCI_VFIO(obj) OBJECT_CHECK(VFIOPCIDevice, obj, TYPE_VFIO_PCI)
48 #define TYPE_VFIO_PCI_NOHOTPLUG "vfio-pci-nohotplug"
50 static void vfio_disable_interrupts(VFIOPCIDevice
*vdev
);
51 static void vfio_mmap_set_enabled(VFIOPCIDevice
*vdev
, bool enabled
);
54 * Disabling BAR mmaping can be slow, but toggling it around INTx can
55 * also be a huge overhead. We try to get the best of both worlds by
56 * waiting until an interrupt to disable mmaps (subsequent transitions
57 * to the same state are effectively no overhead). If the interrupt has
58 * been serviced and the time gap is long enough, we re-enable mmaps for
59 * performance. This works well for things like graphics cards, which
60 * may not use their interrupt at all and are penalized to an unusable
61 * level by read/write BAR traps. Other devices, like NICs, have more
62 * regular interrupts and see much better latency by staying in non-mmap
63 * mode. We therefore set the default mmap_timeout such that a ping
64 * is just enough to keep the mmap disabled. Users can experiment with
65 * other options with the x-intx-mmap-timeout-ms parameter (a value of
66 * zero disables the timer).
68 static void vfio_intx_mmap_enable(void *opaque
)
70 VFIOPCIDevice
*vdev
= opaque
;
72 if (vdev
->intx
.pending
) {
73 timer_mod(vdev
->intx
.mmap_timer
,
74 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL
) + vdev
->intx
.mmap_timeout
);
78 vfio_mmap_set_enabled(vdev
, true);
81 static void vfio_intx_interrupt(void *opaque
)
83 VFIOPCIDevice
*vdev
= opaque
;
85 if (!event_notifier_test_and_clear(&vdev
->intx
.interrupt
)) {
89 trace_vfio_intx_interrupt(vdev
->vbasedev
.name
, 'A' + vdev
->intx
.pin
);
91 vdev
->intx
.pending
= true;
92 pci_irq_assert(&vdev
->pdev
);
93 vfio_mmap_set_enabled(vdev
, false);
94 if (vdev
->intx
.mmap_timeout
) {
95 timer_mod(vdev
->intx
.mmap_timer
,
96 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL
) + vdev
->intx
.mmap_timeout
);
100 static void vfio_intx_eoi(VFIODevice
*vbasedev
)
102 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
104 if (!vdev
->intx
.pending
) {
108 trace_vfio_intx_eoi(vbasedev
->name
);
110 vdev
->intx
.pending
= false;
111 pci_irq_deassert(&vdev
->pdev
);
112 vfio_unmask_single_irqindex(vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
115 static void vfio_intx_enable_kvm(VFIOPCIDevice
*vdev
, Error
**errp
)
118 int irq_fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
);
121 if (vdev
->no_kvm_intx
|| !kvm_irqfds_enabled() ||
122 vdev
->intx
.route
.mode
!= PCI_INTX_ENABLED
||
123 !kvm_resamplefds_enabled()) {
127 /* Get to a known interrupt state */
128 qemu_set_fd_handler(irq_fd
, NULL
, NULL
, vdev
);
129 vfio_mask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
130 vdev
->intx
.pending
= false;
131 pci_irq_deassert(&vdev
->pdev
);
133 /* Get an eventfd for resample/unmask */
134 if (event_notifier_init(&vdev
->intx
.unmask
, 0)) {
135 error_setg(errp
, "event_notifier_init failed eoi");
139 if (kvm_irqchip_add_irqfd_notifier_gsi(kvm_state
,
140 &vdev
->intx
.interrupt
,
142 vdev
->intx
.route
.irq
)) {
143 error_setg_errno(errp
, errno
, "failed to setup resample irqfd");
147 if (vfio_set_irq_signaling(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
, 0,
148 VFIO_IRQ_SET_ACTION_UNMASK
,
149 event_notifier_get_fd(&vdev
->intx
.unmask
),
151 error_propagate(errp
, err
);
156 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
158 vdev
->intx
.kvm_accel
= true;
160 trace_vfio_intx_enable_kvm(vdev
->vbasedev
.name
);
165 kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state
, &vdev
->intx
.interrupt
,
166 vdev
->intx
.route
.irq
);
168 event_notifier_cleanup(&vdev
->intx
.unmask
);
170 qemu_set_fd_handler(irq_fd
, vfio_intx_interrupt
, NULL
, vdev
);
171 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
175 static void vfio_intx_disable_kvm(VFIOPCIDevice
*vdev
)
178 if (!vdev
->intx
.kvm_accel
) {
183 * Get to a known state, hardware masked, QEMU ready to accept new
184 * interrupts, QEMU IRQ de-asserted.
186 vfio_mask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
187 vdev
->intx
.pending
= false;
188 pci_irq_deassert(&vdev
->pdev
);
190 /* Tell KVM to stop listening for an INTx irqfd */
191 if (kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state
, &vdev
->intx
.interrupt
,
192 vdev
->intx
.route
.irq
)) {
193 error_report("vfio: Error: Failed to disable INTx irqfd: %m");
196 /* We only need to close the eventfd for VFIO to cleanup the kernel side */
197 event_notifier_cleanup(&vdev
->intx
.unmask
);
199 /* QEMU starts listening for interrupt events. */
200 qemu_set_fd_handler(event_notifier_get_fd(&vdev
->intx
.interrupt
),
201 vfio_intx_interrupt
, NULL
, vdev
);
203 vdev
->intx
.kvm_accel
= false;
205 /* If we've missed an event, let it re-fire through QEMU */
206 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
208 trace_vfio_intx_disable_kvm(vdev
->vbasedev
.name
);
212 static void vfio_intx_update(VFIOPCIDevice
*vdev
, PCIINTxRoute
*route
)
216 trace_vfio_intx_update(vdev
->vbasedev
.name
,
217 vdev
->intx
.route
.irq
, route
->irq
);
219 vfio_intx_disable_kvm(vdev
);
221 vdev
->intx
.route
= *route
;
223 if (route
->mode
!= PCI_INTX_ENABLED
) {
227 vfio_intx_enable_kvm(vdev
, &err
);
229 warn_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
232 /* Re-enable the interrupt in cased we missed an EOI */
233 vfio_intx_eoi(&vdev
->vbasedev
);
236 static void vfio_intx_routing_notifier(PCIDevice
*pdev
)
238 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
241 if (vdev
->interrupt
!= VFIO_INT_INTx
) {
245 route
= pci_device_route_intx_to_irq(&vdev
->pdev
, vdev
->intx
.pin
);
247 if (pci_intx_route_changed(&vdev
->intx
.route
, &route
)) {
248 vfio_intx_update(vdev
, &route
);
252 static void vfio_irqchip_change(Notifier
*notify
, void *data
)
254 VFIOPCIDevice
*vdev
= container_of(notify
, VFIOPCIDevice
,
255 irqchip_change_notifier
);
257 vfio_intx_update(vdev
, &vdev
->intx
.route
);
260 static int vfio_intx_enable(VFIOPCIDevice
*vdev
, Error
**errp
)
262 uint8_t pin
= vfio_pci_read_config(&vdev
->pdev
, PCI_INTERRUPT_PIN
, 1);
272 vfio_disable_interrupts(vdev
);
274 vdev
->intx
.pin
= pin
- 1; /* Pin A (1) -> irq[0] */
275 pci_config_set_interrupt_pin(vdev
->pdev
.config
, pin
);
279 * Only conditional to avoid generating error messages on platforms
280 * where we won't actually use the result anyway.
282 if (kvm_irqfds_enabled() && kvm_resamplefds_enabled()) {
283 vdev
->intx
.route
= pci_device_route_intx_to_irq(&vdev
->pdev
,
288 ret
= event_notifier_init(&vdev
->intx
.interrupt
, 0);
290 error_setg_errno(errp
, -ret
, "event_notifier_init failed");
293 fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
);
294 qemu_set_fd_handler(fd
, vfio_intx_interrupt
, NULL
, vdev
);
296 if (vfio_set_irq_signaling(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
, 0,
297 VFIO_IRQ_SET_ACTION_TRIGGER
, fd
, &err
)) {
298 error_propagate(errp
, err
);
299 qemu_set_fd_handler(fd
, NULL
, NULL
, vdev
);
300 event_notifier_cleanup(&vdev
->intx
.interrupt
);
304 vfio_intx_enable_kvm(vdev
, &err
);
306 warn_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
309 vdev
->interrupt
= VFIO_INT_INTx
;
311 trace_vfio_intx_enable(vdev
->vbasedev
.name
);
315 static void vfio_intx_disable(VFIOPCIDevice
*vdev
)
319 timer_del(vdev
->intx
.mmap_timer
);
320 vfio_intx_disable_kvm(vdev
);
321 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
322 vdev
->intx
.pending
= false;
323 pci_irq_deassert(&vdev
->pdev
);
324 vfio_mmap_set_enabled(vdev
, true);
326 fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
);
327 qemu_set_fd_handler(fd
, NULL
, NULL
, vdev
);
328 event_notifier_cleanup(&vdev
->intx
.interrupt
);
330 vdev
->interrupt
= VFIO_INT_NONE
;
332 trace_vfio_intx_disable(vdev
->vbasedev
.name
);
338 static void vfio_msi_interrupt(void *opaque
)
340 VFIOMSIVector
*vector
= opaque
;
341 VFIOPCIDevice
*vdev
= vector
->vdev
;
342 MSIMessage (*get_msg
)(PCIDevice
*dev
, unsigned vector
);
343 void (*notify
)(PCIDevice
*dev
, unsigned vector
);
345 int nr
= vector
- vdev
->msi_vectors
;
347 if (!event_notifier_test_and_clear(&vector
->interrupt
)) {
351 if (vdev
->interrupt
== VFIO_INT_MSIX
) {
352 get_msg
= msix_get_message
;
353 notify
= msix_notify
;
355 /* A masked vector firing needs to use the PBA, enable it */
356 if (msix_is_masked(&vdev
->pdev
, nr
)) {
357 set_bit(nr
, vdev
->msix
->pending
);
358 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, true);
359 trace_vfio_msix_pba_enable(vdev
->vbasedev
.name
);
361 } else if (vdev
->interrupt
== VFIO_INT_MSI
) {
362 get_msg
= msi_get_message
;
368 msg
= get_msg(&vdev
->pdev
, nr
);
369 trace_vfio_msi_interrupt(vdev
->vbasedev
.name
, nr
, msg
.address
, msg
.data
);
370 notify(&vdev
->pdev
, nr
);
373 static int vfio_enable_vectors(VFIOPCIDevice
*vdev
, bool msix
)
375 struct vfio_irq_set
*irq_set
;
376 int ret
= 0, i
, argsz
;
379 argsz
= sizeof(*irq_set
) + (vdev
->nr_vectors
* sizeof(*fds
));
381 irq_set
= g_malloc0(argsz
);
382 irq_set
->argsz
= argsz
;
383 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
| VFIO_IRQ_SET_ACTION_TRIGGER
;
384 irq_set
->index
= msix
? VFIO_PCI_MSIX_IRQ_INDEX
: VFIO_PCI_MSI_IRQ_INDEX
;
386 irq_set
->count
= vdev
->nr_vectors
;
387 fds
= (int32_t *)&irq_set
->data
;
389 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
393 * MSI vs MSI-X - The guest has direct access to MSI mask and pending
394 * bits, therefore we always use the KVM signaling path when setup.
395 * MSI-X mask and pending bits are emulated, so we want to use the
396 * KVM signaling path only when configured and unmasked.
398 if (vdev
->msi_vectors
[i
].use
) {
399 if (vdev
->msi_vectors
[i
].virq
< 0 ||
400 (msix
&& msix_is_masked(&vdev
->pdev
, i
))) {
401 fd
= event_notifier_get_fd(&vdev
->msi_vectors
[i
].interrupt
);
403 fd
= event_notifier_get_fd(&vdev
->msi_vectors
[i
].kvm_interrupt
);
410 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
417 static void vfio_add_kvm_msi_virq(VFIOPCIDevice
*vdev
, VFIOMSIVector
*vector
,
418 int vector_n
, bool msix
)
422 if ((msix
&& vdev
->no_kvm_msix
) || (!msix
&& vdev
->no_kvm_msi
)) {
426 if (event_notifier_init(&vector
->kvm_interrupt
, 0)) {
430 virq
= kvm_irqchip_add_msi_route(kvm_state
, vector_n
, &vdev
->pdev
);
432 event_notifier_cleanup(&vector
->kvm_interrupt
);
436 if (kvm_irqchip_add_irqfd_notifier_gsi(kvm_state
, &vector
->kvm_interrupt
,
438 kvm_irqchip_release_virq(kvm_state
, virq
);
439 event_notifier_cleanup(&vector
->kvm_interrupt
);
446 static void vfio_remove_kvm_msi_virq(VFIOMSIVector
*vector
)
448 kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state
, &vector
->kvm_interrupt
,
450 kvm_irqchip_release_virq(kvm_state
, vector
->virq
);
452 event_notifier_cleanup(&vector
->kvm_interrupt
);
455 static void vfio_update_kvm_msi_virq(VFIOMSIVector
*vector
, MSIMessage msg
,
458 kvm_irqchip_update_msi_route(kvm_state
, vector
->virq
, msg
, pdev
);
459 kvm_irqchip_commit_routes(kvm_state
);
462 static int vfio_msix_vector_do_use(PCIDevice
*pdev
, unsigned int nr
,
463 MSIMessage
*msg
, IOHandler
*handler
)
465 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
466 VFIOMSIVector
*vector
;
469 trace_vfio_msix_vector_do_use(vdev
->vbasedev
.name
, nr
);
471 vector
= &vdev
->msi_vectors
[nr
];
476 if (event_notifier_init(&vector
->interrupt
, 0)) {
477 error_report("vfio: Error: event_notifier_init failed");
480 msix_vector_use(pdev
, nr
);
483 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
484 handler
, NULL
, vector
);
487 * Attempt to enable route through KVM irqchip,
488 * default to userspace handling if unavailable.
490 if (vector
->virq
>= 0) {
492 vfio_remove_kvm_msi_virq(vector
);
494 vfio_update_kvm_msi_virq(vector
, *msg
, pdev
);
498 vfio_add_kvm_msi_virq(vdev
, vector
, nr
, true);
503 * We don't want to have the host allocate all possible MSI vectors
504 * for a device if they're not in use, so we shutdown and incrementally
505 * increase them as needed.
507 if (vdev
->nr_vectors
< nr
+ 1) {
508 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSIX_IRQ_INDEX
);
509 vdev
->nr_vectors
= nr
+ 1;
510 ret
= vfio_enable_vectors(vdev
, true);
512 error_report("vfio: failed to enable vectors, %d", ret
);
518 if (vector
->virq
>= 0) {
519 fd
= event_notifier_get_fd(&vector
->kvm_interrupt
);
521 fd
= event_notifier_get_fd(&vector
->interrupt
);
524 if (vfio_set_irq_signaling(&vdev
->vbasedev
,
525 VFIO_PCI_MSIX_IRQ_INDEX
, nr
,
526 VFIO_IRQ_SET_ACTION_TRIGGER
, fd
, &err
)) {
527 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
531 /* Disable PBA emulation when nothing more is pending. */
532 clear_bit(nr
, vdev
->msix
->pending
);
533 if (find_first_bit(vdev
->msix
->pending
,
534 vdev
->nr_vectors
) == vdev
->nr_vectors
) {
535 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, false);
536 trace_vfio_msix_pba_disable(vdev
->vbasedev
.name
);
542 static int vfio_msix_vector_use(PCIDevice
*pdev
,
543 unsigned int nr
, MSIMessage msg
)
545 return vfio_msix_vector_do_use(pdev
, nr
, &msg
, vfio_msi_interrupt
);
548 static void vfio_msix_vector_release(PCIDevice
*pdev
, unsigned int nr
)
550 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
551 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[nr
];
553 trace_vfio_msix_vector_release(vdev
->vbasedev
.name
, nr
);
556 * There are still old guests that mask and unmask vectors on every
557 * interrupt. If we're using QEMU bypass with a KVM irqfd, leave all of
558 * the KVM setup in place, simply switch VFIO to use the non-bypass
559 * eventfd. We'll then fire the interrupt through QEMU and the MSI-X
560 * core will mask the interrupt and set pending bits, allowing it to
561 * be re-asserted on unmask. Nothing to do if already using QEMU mode.
563 if (vector
->virq
>= 0) {
564 int32_t fd
= event_notifier_get_fd(&vector
->interrupt
);
567 if (vfio_set_irq_signaling(&vdev
->vbasedev
, VFIO_PCI_MSIX_IRQ_INDEX
, nr
,
568 VFIO_IRQ_SET_ACTION_TRIGGER
, fd
, &err
)) {
569 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
574 static void vfio_msix_enable(VFIOPCIDevice
*vdev
)
576 vfio_disable_interrupts(vdev
);
578 vdev
->msi_vectors
= g_new0(VFIOMSIVector
, vdev
->msix
->entries
);
580 vdev
->interrupt
= VFIO_INT_MSIX
;
583 * Some communication channels between VF & PF or PF & fw rely on the
584 * physical state of the device and expect that enabling MSI-X from the
585 * guest enables the same on the host. When our guest is Linux, the
586 * guest driver call to pci_enable_msix() sets the enabling bit in the
587 * MSI-X capability, but leaves the vector table masked. We therefore
588 * can't rely on a vector_use callback (from request_irq() in the guest)
589 * to switch the physical device into MSI-X mode because that may come a
590 * long time after pci_enable_msix(). This code enables vector 0 with
591 * triggering to userspace, then immediately release the vector, leaving
592 * the physical device with no vectors enabled, but MSI-X enabled, just
593 * like the guest view.
595 vfio_msix_vector_do_use(&vdev
->pdev
, 0, NULL
, NULL
);
596 vfio_msix_vector_release(&vdev
->pdev
, 0);
598 if (msix_set_vector_notifiers(&vdev
->pdev
, vfio_msix_vector_use
,
599 vfio_msix_vector_release
, NULL
)) {
600 error_report("vfio: msix_set_vector_notifiers failed");
603 trace_vfio_msix_enable(vdev
->vbasedev
.name
);
606 static void vfio_msi_enable(VFIOPCIDevice
*vdev
)
610 vfio_disable_interrupts(vdev
);
612 vdev
->nr_vectors
= msi_nr_vectors_allocated(&vdev
->pdev
);
614 vdev
->msi_vectors
= g_new0(VFIOMSIVector
, vdev
->nr_vectors
);
616 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
617 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
623 if (event_notifier_init(&vector
->interrupt
, 0)) {
624 error_report("vfio: Error: event_notifier_init failed");
627 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
628 vfio_msi_interrupt
, NULL
, vector
);
631 * Attempt to enable route through KVM irqchip,
632 * default to userspace handling if unavailable.
634 vfio_add_kvm_msi_virq(vdev
, vector
, i
, false);
637 /* Set interrupt type prior to possible interrupts */
638 vdev
->interrupt
= VFIO_INT_MSI
;
640 ret
= vfio_enable_vectors(vdev
, false);
643 error_report("vfio: Error: Failed to setup MSI fds: %m");
644 } else if (ret
!= vdev
->nr_vectors
) {
645 error_report("vfio: Error: Failed to enable %d "
646 "MSI vectors, retry with %d", vdev
->nr_vectors
, ret
);
649 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
650 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
651 if (vector
->virq
>= 0) {
652 vfio_remove_kvm_msi_virq(vector
);
654 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
656 event_notifier_cleanup(&vector
->interrupt
);
659 g_free(vdev
->msi_vectors
);
660 vdev
->msi_vectors
= NULL
;
662 if (ret
> 0 && ret
!= vdev
->nr_vectors
) {
663 vdev
->nr_vectors
= ret
;
666 vdev
->nr_vectors
= 0;
669 * Failing to setup MSI doesn't really fall within any specification.
670 * Let's try leaving interrupts disabled and hope the guest figures
671 * out to fall back to INTx for this device.
673 error_report("vfio: Error: Failed to enable MSI");
674 vdev
->interrupt
= VFIO_INT_NONE
;
679 trace_vfio_msi_enable(vdev
->vbasedev
.name
, vdev
->nr_vectors
);
682 static void vfio_msi_disable_common(VFIOPCIDevice
*vdev
)
687 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
688 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
689 if (vdev
->msi_vectors
[i
].use
) {
690 if (vector
->virq
>= 0) {
691 vfio_remove_kvm_msi_virq(vector
);
693 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
695 event_notifier_cleanup(&vector
->interrupt
);
699 g_free(vdev
->msi_vectors
);
700 vdev
->msi_vectors
= NULL
;
701 vdev
->nr_vectors
= 0;
702 vdev
->interrupt
= VFIO_INT_NONE
;
704 vfio_intx_enable(vdev
, &err
);
706 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
710 static void vfio_msix_disable(VFIOPCIDevice
*vdev
)
714 msix_unset_vector_notifiers(&vdev
->pdev
);
717 * MSI-X will only release vectors if MSI-X is still enabled on the
718 * device, check through the rest and release it ourselves if necessary.
720 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
721 if (vdev
->msi_vectors
[i
].use
) {
722 vfio_msix_vector_release(&vdev
->pdev
, i
);
723 msix_vector_unuse(&vdev
->pdev
, i
);
727 if (vdev
->nr_vectors
) {
728 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSIX_IRQ_INDEX
);
731 vfio_msi_disable_common(vdev
);
733 memset(vdev
->msix
->pending
, 0,
734 BITS_TO_LONGS(vdev
->msix
->entries
) * sizeof(unsigned long));
736 trace_vfio_msix_disable(vdev
->vbasedev
.name
);
739 static void vfio_msi_disable(VFIOPCIDevice
*vdev
)
741 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSI_IRQ_INDEX
);
742 vfio_msi_disable_common(vdev
);
744 trace_vfio_msi_disable(vdev
->vbasedev
.name
);
747 static void vfio_update_msi(VFIOPCIDevice
*vdev
)
751 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
752 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
755 if (!vector
->use
|| vector
->virq
< 0) {
759 msg
= msi_get_message(&vdev
->pdev
, i
);
760 vfio_update_kvm_msi_virq(vector
, msg
, &vdev
->pdev
);
764 static void vfio_pci_load_rom(VFIOPCIDevice
*vdev
)
766 struct vfio_region_info
*reg_info
;
771 if (vfio_get_region_info(&vdev
->vbasedev
,
772 VFIO_PCI_ROM_REGION_INDEX
, ®_info
)) {
773 error_report("vfio: Error getting ROM info: %m");
777 trace_vfio_pci_load_rom(vdev
->vbasedev
.name
, (unsigned long)reg_info
->size
,
778 (unsigned long)reg_info
->offset
,
779 (unsigned long)reg_info
->flags
);
781 vdev
->rom_size
= size
= reg_info
->size
;
782 vdev
->rom_offset
= reg_info
->offset
;
786 if (!vdev
->rom_size
) {
787 vdev
->rom_read_failed
= true;
788 error_report("vfio-pci: Cannot read device rom at "
789 "%s", vdev
->vbasedev
.name
);
790 error_printf("Device option ROM contents are probably invalid "
791 "(check dmesg).\nSkip option ROM probe with rombar=0, "
792 "or load from file with romfile=\n");
796 vdev
->rom
= g_malloc(size
);
797 memset(vdev
->rom
, 0xff, size
);
800 bytes
= pread(vdev
->vbasedev
.fd
, vdev
->rom
+ off
,
801 size
, vdev
->rom_offset
+ off
);
804 } else if (bytes
> 0) {
808 if (errno
== EINTR
|| errno
== EAGAIN
) {
811 error_report("vfio: Error reading device ROM: %m");
817 * Test the ROM signature against our device, if the vendor is correct
818 * but the device ID doesn't match, store the correct device ID and
819 * recompute the checksum. Intel IGD devices need this and are known
820 * to have bogus checksums so we can't simply adjust the checksum.
822 if (pci_get_word(vdev
->rom
) == 0xaa55 &&
823 pci_get_word(vdev
->rom
+ 0x18) + 8 < vdev
->rom_size
&&
824 !memcmp(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18), "PCIR", 4)) {
827 vid
= pci_get_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 4);
828 did
= pci_get_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 6);
830 if (vid
== vdev
->vendor_id
&& did
!= vdev
->device_id
) {
832 uint8_t csum
, *data
= vdev
->rom
;
834 pci_set_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 6,
838 for (csum
= 0, i
= 0; i
< vdev
->rom_size
; i
++) {
847 static uint64_t vfio_rom_read(void *opaque
, hwaddr addr
, unsigned size
)
849 VFIOPCIDevice
*vdev
= opaque
;
858 /* Load the ROM lazily when the guest tries to read it */
859 if (unlikely(!vdev
->rom
&& !vdev
->rom_read_failed
)) {
860 vfio_pci_load_rom(vdev
);
863 memcpy(&val
, vdev
->rom
+ addr
,
864 (addr
< vdev
->rom_size
) ? MIN(size
, vdev
->rom_size
- addr
) : 0);
871 data
= le16_to_cpu(val
.word
);
874 data
= le32_to_cpu(val
.dword
);
877 hw_error("vfio: unsupported read size, %d bytes\n", size
);
881 trace_vfio_rom_read(vdev
->vbasedev
.name
, addr
, size
, data
);
886 static void vfio_rom_write(void *opaque
, hwaddr addr
,
887 uint64_t data
, unsigned size
)
891 static const MemoryRegionOps vfio_rom_ops
= {
892 .read
= vfio_rom_read
,
893 .write
= vfio_rom_write
,
894 .endianness
= DEVICE_LITTLE_ENDIAN
,
897 static void vfio_pci_size_rom(VFIOPCIDevice
*vdev
)
899 uint32_t orig
, size
= cpu_to_le32((uint32_t)PCI_ROM_ADDRESS_MASK
);
900 off_t offset
= vdev
->config_offset
+ PCI_ROM_ADDRESS
;
901 DeviceState
*dev
= DEVICE(vdev
);
903 int fd
= vdev
->vbasedev
.fd
;
905 if (vdev
->pdev
.romfile
|| !vdev
->pdev
.rom_bar
) {
906 /* Since pci handles romfile, just print a message and return */
907 if (vfio_blacklist_opt_rom(vdev
) && vdev
->pdev
.romfile
) {
908 warn_report("Device at %s is known to cause system instability"
909 " issues during option rom execution",
910 vdev
->vbasedev
.name
);
911 error_printf("Proceeding anyway since user specified romfile\n");
917 * Use the same size ROM BAR as the physical device. The contents
918 * will get filled in later when the guest tries to read it.
920 if (pread(fd
, &orig
, 4, offset
) != 4 ||
921 pwrite(fd
, &size
, 4, offset
) != 4 ||
922 pread(fd
, &size
, 4, offset
) != 4 ||
923 pwrite(fd
, &orig
, 4, offset
) != 4) {
924 error_report("%s(%s) failed: %m", __func__
, vdev
->vbasedev
.name
);
928 size
= ~(le32_to_cpu(size
) & PCI_ROM_ADDRESS_MASK
) + 1;
934 if (vfio_blacklist_opt_rom(vdev
)) {
935 if (dev
->opts
&& qemu_opt_get(dev
->opts
, "rombar")) {
936 warn_report("Device at %s is known to cause system instability"
937 " issues during option rom execution",
938 vdev
->vbasedev
.name
);
939 error_printf("Proceeding anyway since user specified"
940 " non zero value for rombar\n");
942 warn_report("Rom loading for device at %s has been disabled"
943 " due to system instability issues",
944 vdev
->vbasedev
.name
);
945 error_printf("Specify rombar=1 or romfile to force\n");
950 trace_vfio_pci_size_rom(vdev
->vbasedev
.name
, size
);
952 name
= g_strdup_printf("vfio[%s].rom", vdev
->vbasedev
.name
);
954 memory_region_init_io(&vdev
->pdev
.rom
, OBJECT(vdev
),
955 &vfio_rom_ops
, vdev
, name
, size
);
958 pci_register_bar(&vdev
->pdev
, PCI_ROM_SLOT
,
959 PCI_BASE_ADDRESS_SPACE_MEMORY
, &vdev
->pdev
.rom
);
961 vdev
->rom_read_failed
= false;
964 void vfio_vga_write(void *opaque
, hwaddr addr
,
965 uint64_t data
, unsigned size
)
967 VFIOVGARegion
*region
= opaque
;
968 VFIOVGA
*vga
= container_of(region
, VFIOVGA
, region
[region
->nr
]);
975 off_t offset
= vga
->fd_offset
+ region
->offset
+ addr
;
982 buf
.word
= cpu_to_le16(data
);
985 buf
.dword
= cpu_to_le32(data
);
988 hw_error("vfio: unsupported write size, %d bytes", size
);
992 if (pwrite(vga
->fd
, &buf
, size
, offset
) != size
) {
993 error_report("%s(,0x%"HWADDR_PRIx
", 0x%"PRIx64
", %d) failed: %m",
994 __func__
, region
->offset
+ addr
, data
, size
);
997 trace_vfio_vga_write(region
->offset
+ addr
, data
, size
);
1000 uint64_t vfio_vga_read(void *opaque
, hwaddr addr
, unsigned size
)
1002 VFIOVGARegion
*region
= opaque
;
1003 VFIOVGA
*vga
= container_of(region
, VFIOVGA
, region
[region
->nr
]);
1011 off_t offset
= vga
->fd_offset
+ region
->offset
+ addr
;
1013 if (pread(vga
->fd
, &buf
, size
, offset
) != size
) {
1014 error_report("%s(,0x%"HWADDR_PRIx
", %d) failed: %m",
1015 __func__
, region
->offset
+ addr
, size
);
1016 return (uint64_t)-1;
1024 data
= le16_to_cpu(buf
.word
);
1027 data
= le32_to_cpu(buf
.dword
);
1030 hw_error("vfio: unsupported read size, %d bytes", size
);
1034 trace_vfio_vga_read(region
->offset
+ addr
, size
, data
);
1039 static const MemoryRegionOps vfio_vga_ops
= {
1040 .read
= vfio_vga_read
,
1041 .write
= vfio_vga_write
,
1042 .endianness
= DEVICE_LITTLE_ENDIAN
,
1046 * Expand memory region of sub-page(size < PAGE_SIZE) MMIO BAR to page
1047 * size if the BAR is in an exclusive page in host so that we could map
1048 * this BAR to guest. But this sub-page BAR may not occupy an exclusive
1049 * page in guest. So we should set the priority of the expanded memory
1050 * region to zero in case of overlap with BARs which share the same page
1051 * with the sub-page BAR in guest. Besides, we should also recover the
1052 * size of this sub-page BAR when its base address is changed in guest
1053 * and not page aligned any more.
1055 static void vfio_sub_page_bar_update_mapping(PCIDevice
*pdev
, int bar
)
1057 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
1058 VFIORegion
*region
= &vdev
->bars
[bar
].region
;
1059 MemoryRegion
*mmap_mr
, *region_mr
, *base_mr
;
1062 uint64_t size
= region
->size
;
1064 /* Make sure that the whole region is allowed to be mmapped */
1065 if (region
->nr_mmaps
!= 1 || !region
->mmaps
[0].mmap
||
1066 region
->mmaps
[0].size
!= region
->size
) {
1070 r
= &pdev
->io_regions
[bar
];
1072 base_mr
= vdev
->bars
[bar
].mr
;
1073 region_mr
= region
->mem
;
1074 mmap_mr
= ®ion
->mmaps
[0].mem
;
1076 /* If BAR is mapped and page aligned, update to fill PAGE_SIZE */
1077 if (bar_addr
!= PCI_BAR_UNMAPPED
&&
1078 !(bar_addr
& ~qemu_real_host_page_mask
)) {
1079 size
= qemu_real_host_page_size
;
1082 memory_region_transaction_begin();
1084 if (vdev
->bars
[bar
].size
< size
) {
1085 memory_region_set_size(base_mr
, size
);
1087 memory_region_set_size(region_mr
, size
);
1088 memory_region_set_size(mmap_mr
, size
);
1089 if (size
!= vdev
->bars
[bar
].size
&& memory_region_is_mapped(base_mr
)) {
1090 memory_region_del_subregion(r
->address_space
, base_mr
);
1091 memory_region_add_subregion_overlap(r
->address_space
,
1092 bar_addr
, base_mr
, 0);
1095 memory_region_transaction_commit();
1101 uint32_t vfio_pci_read_config(PCIDevice
*pdev
, uint32_t addr
, int len
)
1103 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
1104 uint32_t emu_bits
= 0, emu_val
= 0, phys_val
= 0, val
;
1106 memcpy(&emu_bits
, vdev
->emulated_config_bits
+ addr
, len
);
1107 emu_bits
= le32_to_cpu(emu_bits
);
1110 emu_val
= pci_default_read_config(pdev
, addr
, len
);
1113 if (~emu_bits
& (0xffffffffU
>> (32 - len
* 8))) {
1116 ret
= pread(vdev
->vbasedev
.fd
, &phys_val
, len
,
1117 vdev
->config_offset
+ addr
);
1119 error_report("%s(%s, 0x%x, 0x%x) failed: %m",
1120 __func__
, vdev
->vbasedev
.name
, addr
, len
);
1123 phys_val
= le32_to_cpu(phys_val
);
1126 val
= (emu_val
& emu_bits
) | (phys_val
& ~emu_bits
);
1128 trace_vfio_pci_read_config(vdev
->vbasedev
.name
, addr
, len
, val
);
1133 void vfio_pci_write_config(PCIDevice
*pdev
,
1134 uint32_t addr
, uint32_t val
, int len
)
1136 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
1137 uint32_t val_le
= cpu_to_le32(val
);
1139 trace_vfio_pci_write_config(vdev
->vbasedev
.name
, addr
, val
, len
);
1141 /* Write everything to VFIO, let it filter out what we can't write */
1142 if (pwrite(vdev
->vbasedev
.fd
, &val_le
, len
, vdev
->config_offset
+ addr
)
1144 error_report("%s(%s, 0x%x, 0x%x, 0x%x) failed: %m",
1145 __func__
, vdev
->vbasedev
.name
, addr
, val
, len
);
1148 /* MSI/MSI-X Enabling/Disabling */
1149 if (pdev
->cap_present
& QEMU_PCI_CAP_MSI
&&
1150 ranges_overlap(addr
, len
, pdev
->msi_cap
, vdev
->msi_cap_size
)) {
1151 int is_enabled
, was_enabled
= msi_enabled(pdev
);
1153 pci_default_write_config(pdev
, addr
, val
, len
);
1155 is_enabled
= msi_enabled(pdev
);
1159 vfio_msi_enable(vdev
);
1163 vfio_msi_disable(vdev
);
1165 vfio_update_msi(vdev
);
1168 } else if (pdev
->cap_present
& QEMU_PCI_CAP_MSIX
&&
1169 ranges_overlap(addr
, len
, pdev
->msix_cap
, MSIX_CAP_LENGTH
)) {
1170 int is_enabled
, was_enabled
= msix_enabled(pdev
);
1172 pci_default_write_config(pdev
, addr
, val
, len
);
1174 is_enabled
= msix_enabled(pdev
);
1176 if (!was_enabled
&& is_enabled
) {
1177 vfio_msix_enable(vdev
);
1178 } else if (was_enabled
&& !is_enabled
) {
1179 vfio_msix_disable(vdev
);
1181 } else if (ranges_overlap(addr
, len
, PCI_BASE_ADDRESS_0
, 24) ||
1182 range_covers_byte(addr
, len
, PCI_COMMAND
)) {
1183 pcibus_t old_addr
[PCI_NUM_REGIONS
- 1];
1186 for (bar
= 0; bar
< PCI_ROM_SLOT
; bar
++) {
1187 old_addr
[bar
] = pdev
->io_regions
[bar
].addr
;
1190 pci_default_write_config(pdev
, addr
, val
, len
);
1192 for (bar
= 0; bar
< PCI_ROM_SLOT
; bar
++) {
1193 if (old_addr
[bar
] != pdev
->io_regions
[bar
].addr
&&
1194 vdev
->bars
[bar
].region
.size
> 0 &&
1195 vdev
->bars
[bar
].region
.size
< qemu_real_host_page_size
) {
1196 vfio_sub_page_bar_update_mapping(pdev
, bar
);
1200 /* Write everything to QEMU to keep emulated bits correct */
1201 pci_default_write_config(pdev
, addr
, val
, len
);
1208 static void vfio_disable_interrupts(VFIOPCIDevice
*vdev
)
1211 * More complicated than it looks. Disabling MSI/X transitions the
1212 * device to INTx mode (if supported). Therefore we need to first
1213 * disable MSI/X and then cleanup by disabling INTx.
1215 if (vdev
->interrupt
== VFIO_INT_MSIX
) {
1216 vfio_msix_disable(vdev
);
1217 } else if (vdev
->interrupt
== VFIO_INT_MSI
) {
1218 vfio_msi_disable(vdev
);
1221 if (vdev
->interrupt
== VFIO_INT_INTx
) {
1222 vfio_intx_disable(vdev
);
1226 static int vfio_msi_setup(VFIOPCIDevice
*vdev
, int pos
, Error
**errp
)
1229 bool msi_64bit
, msi_maskbit
;
1233 if (pread(vdev
->vbasedev
.fd
, &ctrl
, sizeof(ctrl
),
1234 vdev
->config_offset
+ pos
+ PCI_CAP_FLAGS
) != sizeof(ctrl
)) {
1235 error_setg_errno(errp
, errno
, "failed reading MSI PCI_CAP_FLAGS");
1238 ctrl
= le16_to_cpu(ctrl
);
1240 msi_64bit
= !!(ctrl
& PCI_MSI_FLAGS_64BIT
);
1241 msi_maskbit
= !!(ctrl
& PCI_MSI_FLAGS_MASKBIT
);
1242 entries
= 1 << ((ctrl
& PCI_MSI_FLAGS_QMASK
) >> 1);
1244 trace_vfio_msi_setup(vdev
->vbasedev
.name
, pos
);
1246 ret
= msi_init(&vdev
->pdev
, pos
, entries
, msi_64bit
, msi_maskbit
, &err
);
1248 if (ret
== -ENOTSUP
) {
1251 error_propagate_prepend(errp
, err
, "msi_init failed: ");
1254 vdev
->msi_cap_size
= 0xa + (msi_maskbit
? 0xa : 0) + (msi_64bit
? 0x4 : 0);
1259 static void vfio_pci_fixup_msix_region(VFIOPCIDevice
*vdev
)
1262 VFIORegion
*region
= &vdev
->bars
[vdev
->msix
->table_bar
].region
;
1265 * If the host driver allows mapping of a MSIX data, we are going to
1266 * do map the entire BAR and emulate MSIX table on top of that.
1268 if (vfio_has_region_cap(&vdev
->vbasedev
, region
->nr
,
1269 VFIO_REGION_INFO_CAP_MSIX_MAPPABLE
)) {
1274 * We expect to find a single mmap covering the whole BAR, anything else
1275 * means it's either unsupported or already setup.
1277 if (region
->nr_mmaps
!= 1 || region
->mmaps
[0].offset
||
1278 region
->size
!= region
->mmaps
[0].size
) {
1282 /* MSI-X table start and end aligned to host page size */
1283 start
= vdev
->msix
->table_offset
& qemu_real_host_page_mask
;
1284 end
= REAL_HOST_PAGE_ALIGN((uint64_t)vdev
->msix
->table_offset
+
1285 (vdev
->msix
->entries
* PCI_MSIX_ENTRY_SIZE
));
1288 * Does the MSI-X table cover the beginning of the BAR? The whole BAR?
1289 * NB - Host page size is necessarily a power of two and so is the PCI
1290 * BAR (not counting EA yet), therefore if we have host page aligned
1291 * @start and @end, then any remainder of the BAR before or after those
1292 * must be at least host page sized and therefore mmap'able.
1295 if (end
>= region
->size
) {
1296 region
->nr_mmaps
= 0;
1297 g_free(region
->mmaps
);
1298 region
->mmaps
= NULL
;
1299 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1300 vdev
->msix
->table_bar
, 0, 0);
1302 region
->mmaps
[0].offset
= end
;
1303 region
->mmaps
[0].size
= region
->size
- end
;
1304 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1305 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1306 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1309 /* Maybe it's aligned at the end of the BAR */
1310 } else if (end
>= region
->size
) {
1311 region
->mmaps
[0].size
= start
;
1312 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1313 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1314 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1316 /* Otherwise it must split the BAR */
1318 region
->nr_mmaps
= 2;
1319 region
->mmaps
= g_renew(VFIOMmap
, region
->mmaps
, 2);
1321 memcpy(®ion
->mmaps
[1], ®ion
->mmaps
[0], sizeof(VFIOMmap
));
1323 region
->mmaps
[0].size
= start
;
1324 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1325 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1326 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1328 region
->mmaps
[1].offset
= end
;
1329 region
->mmaps
[1].size
= region
->size
- end
;
1330 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1331 vdev
->msix
->table_bar
, region
->mmaps
[1].offset
,
1332 region
->mmaps
[1].offset
+ region
->mmaps
[1].size
);
1336 static void vfio_pci_relocate_msix(VFIOPCIDevice
*vdev
, Error
**errp
)
1338 int target_bar
= -1;
1341 if (!vdev
->msix
|| vdev
->msix_relo
== OFF_AUTOPCIBAR_OFF
) {
1345 /* The actual minimum size of MSI-X structures */
1346 msix_sz
= (vdev
->msix
->entries
* PCI_MSIX_ENTRY_SIZE
) +
1347 (QEMU_ALIGN_UP(vdev
->msix
->entries
, 64) / 8);
1348 /* Round up to host pages, we don't want to share a page */
1349 msix_sz
= REAL_HOST_PAGE_ALIGN(msix_sz
);
1350 /* PCI BARs must be a power of 2 */
1351 msix_sz
= pow2ceil(msix_sz
);
1353 if (vdev
->msix_relo
== OFF_AUTOPCIBAR_AUTO
) {
1355 * TODO: Lookup table for known devices.
1357 * Logically we might use an algorithm here to select the BAR adding
1358 * the least additional MMIO space, but we cannot programatically
1359 * predict the driver dependency on BAR ordering or sizing, therefore
1360 * 'auto' becomes a lookup for combinations reported to work.
1362 if (target_bar
< 0) {
1363 error_setg(errp
, "No automatic MSI-X relocation available for "
1364 "device %04x:%04x", vdev
->vendor_id
, vdev
->device_id
);
1368 target_bar
= (int)(vdev
->msix_relo
- OFF_AUTOPCIBAR_BAR0
);
1371 /* I/O port BARs cannot host MSI-X structures */
1372 if (vdev
->bars
[target_bar
].ioport
) {
1373 error_setg(errp
, "Invalid MSI-X relocation BAR %d, "
1374 "I/O port BAR", target_bar
);
1378 /* Cannot use a BAR in the "shadow" of a 64-bit BAR */
1379 if (!vdev
->bars
[target_bar
].size
&&
1380 target_bar
> 0 && vdev
->bars
[target_bar
- 1].mem64
) {
1381 error_setg(errp
, "Invalid MSI-X relocation BAR %d, "
1382 "consumed by 64-bit BAR %d", target_bar
, target_bar
- 1);
1386 /* 2GB max size for 32-bit BARs, cannot double if already > 1G */
1387 if (vdev
->bars
[target_bar
].size
> 1 * GiB
&&
1388 !vdev
->bars
[target_bar
].mem64
) {
1389 error_setg(errp
, "Invalid MSI-X relocation BAR %d, "
1390 "no space to extend 32-bit BAR", target_bar
);
1395 * If adding a new BAR, test if we can make it 64bit. We make it
1396 * prefetchable since QEMU MSI-X emulation has no read side effects
1397 * and doing so makes mapping more flexible.
1399 if (!vdev
->bars
[target_bar
].size
) {
1400 if (target_bar
< (PCI_ROM_SLOT
- 1) &&
1401 !vdev
->bars
[target_bar
+ 1].size
) {
1402 vdev
->bars
[target_bar
].mem64
= true;
1403 vdev
->bars
[target_bar
].type
= PCI_BASE_ADDRESS_MEM_TYPE_64
;
1405 vdev
->bars
[target_bar
].type
|= PCI_BASE_ADDRESS_MEM_PREFETCH
;
1406 vdev
->bars
[target_bar
].size
= msix_sz
;
1407 vdev
->msix
->table_offset
= 0;
1409 vdev
->bars
[target_bar
].size
= MAX(vdev
->bars
[target_bar
].size
* 2,
1412 * Due to above size calc, MSI-X always starts halfway into the BAR,
1413 * which will always be a separate host page.
1415 vdev
->msix
->table_offset
= vdev
->bars
[target_bar
].size
/ 2;
1418 vdev
->msix
->table_bar
= target_bar
;
1419 vdev
->msix
->pba_bar
= target_bar
;
1420 /* Requires 8-byte alignment, but PCI_MSIX_ENTRY_SIZE guarantees that */
1421 vdev
->msix
->pba_offset
= vdev
->msix
->table_offset
+
1422 (vdev
->msix
->entries
* PCI_MSIX_ENTRY_SIZE
);
1424 trace_vfio_msix_relo(vdev
->vbasedev
.name
,
1425 vdev
->msix
->table_bar
, vdev
->msix
->table_offset
);
1429 * We don't have any control over how pci_add_capability() inserts
1430 * capabilities into the chain. In order to setup MSI-X we need a
1431 * MemoryRegion for the BAR. In order to setup the BAR and not
1432 * attempt to mmap the MSI-X table area, which VFIO won't allow, we
1433 * need to first look for where the MSI-X table lives. So we
1434 * unfortunately split MSI-X setup across two functions.
1436 static void vfio_msix_early_setup(VFIOPCIDevice
*vdev
, Error
**errp
)
1440 uint32_t table
, pba
;
1441 int fd
= vdev
->vbasedev
.fd
;
1444 pos
= pci_find_capability(&vdev
->pdev
, PCI_CAP_ID_MSIX
);
1449 if (pread(fd
, &ctrl
, sizeof(ctrl
),
1450 vdev
->config_offset
+ pos
+ PCI_MSIX_FLAGS
) != sizeof(ctrl
)) {
1451 error_setg_errno(errp
, errno
, "failed to read PCI MSIX FLAGS");
1455 if (pread(fd
, &table
, sizeof(table
),
1456 vdev
->config_offset
+ pos
+ PCI_MSIX_TABLE
) != sizeof(table
)) {
1457 error_setg_errno(errp
, errno
, "failed to read PCI MSIX TABLE");
1461 if (pread(fd
, &pba
, sizeof(pba
),
1462 vdev
->config_offset
+ pos
+ PCI_MSIX_PBA
) != sizeof(pba
)) {
1463 error_setg_errno(errp
, errno
, "failed to read PCI MSIX PBA");
1467 ctrl
= le16_to_cpu(ctrl
);
1468 table
= le32_to_cpu(table
);
1469 pba
= le32_to_cpu(pba
);
1471 msix
= g_malloc0(sizeof(*msix
));
1472 msix
->table_bar
= table
& PCI_MSIX_FLAGS_BIRMASK
;
1473 msix
->table_offset
= table
& ~PCI_MSIX_FLAGS_BIRMASK
;
1474 msix
->pba_bar
= pba
& PCI_MSIX_FLAGS_BIRMASK
;
1475 msix
->pba_offset
= pba
& ~PCI_MSIX_FLAGS_BIRMASK
;
1476 msix
->entries
= (ctrl
& PCI_MSIX_FLAGS_QSIZE
) + 1;
1479 * Test the size of the pba_offset variable and catch if it extends outside
1480 * of the specified BAR. If it is the case, we need to apply a hardware
1481 * specific quirk if the device is known or we have a broken configuration.
1483 if (msix
->pba_offset
>= vdev
->bars
[msix
->pba_bar
].region
.size
) {
1485 * Chelsio T5 Virtual Function devices are encoded as 0x58xx for T5
1486 * adapters. The T5 hardware returns an incorrect value of 0x8000 for
1487 * the VF PBA offset while the BAR itself is only 8k. The correct value
1488 * is 0x1000, so we hard code that here.
1490 if (vdev
->vendor_id
== PCI_VENDOR_ID_CHELSIO
&&
1491 (vdev
->device_id
& 0xff00) == 0x5800) {
1492 msix
->pba_offset
= 0x1000;
1493 } else if (vdev
->msix_relo
== OFF_AUTOPCIBAR_OFF
) {
1494 error_setg(errp
, "hardware reports invalid configuration, "
1495 "MSIX PBA outside of specified BAR");
1501 trace_vfio_msix_early_setup(vdev
->vbasedev
.name
, pos
, msix
->table_bar
,
1502 msix
->table_offset
, msix
->entries
);
1505 vfio_pci_fixup_msix_region(vdev
);
1507 vfio_pci_relocate_msix(vdev
, errp
);
1510 static int vfio_msix_setup(VFIOPCIDevice
*vdev
, int pos
, Error
**errp
)
1515 vdev
->msix
->pending
= g_malloc0(BITS_TO_LONGS(vdev
->msix
->entries
) *
1516 sizeof(unsigned long));
1517 ret
= msix_init(&vdev
->pdev
, vdev
->msix
->entries
,
1518 vdev
->bars
[vdev
->msix
->table_bar
].mr
,
1519 vdev
->msix
->table_bar
, vdev
->msix
->table_offset
,
1520 vdev
->bars
[vdev
->msix
->pba_bar
].mr
,
1521 vdev
->msix
->pba_bar
, vdev
->msix
->pba_offset
, pos
,
1524 if (ret
== -ENOTSUP
) {
1525 warn_report_err(err
);
1529 error_propagate(errp
, err
);
1534 * The PCI spec suggests that devices provide additional alignment for
1535 * MSI-X structures and avoid overlapping non-MSI-X related registers.
1536 * For an assigned device, this hopefully means that emulation of MSI-X
1537 * structures does not affect the performance of the device. If devices
1538 * fail to provide that alignment, a significant performance penalty may
1539 * result, for instance Mellanox MT27500 VFs:
1540 * http://www.spinics.net/lists/kvm/msg125881.html
1542 * The PBA is simply not that important for such a serious regression and
1543 * most drivers do not appear to look at it. The solution for this is to
1544 * disable the PBA MemoryRegion unless it's being used. We disable it
1545 * here and only enable it if a masked vector fires through QEMU. As the
1546 * vector-use notifier is called, which occurs on unmask, we test whether
1547 * PBA emulation is needed and again disable if not.
1549 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, false);
1552 * The emulated machine may provide a paravirt interface for MSIX setup
1553 * so it is not strictly necessary to emulate MSIX here. This becomes
1554 * helpful when frequently accessed MMIO registers are located in
1555 * subpages adjacent to the MSIX table but the MSIX data containing page
1556 * cannot be mapped because of a host page size bigger than the MSIX table
1559 if (object_property_get_bool(OBJECT(qdev_get_machine()),
1560 "vfio-no-msix-emulation", NULL
)) {
1561 memory_region_set_enabled(&vdev
->pdev
.msix_table_mmio
, false);
1567 static void vfio_teardown_msi(VFIOPCIDevice
*vdev
)
1569 msi_uninit(&vdev
->pdev
);
1572 msix_uninit(&vdev
->pdev
,
1573 vdev
->bars
[vdev
->msix
->table_bar
].mr
,
1574 vdev
->bars
[vdev
->msix
->pba_bar
].mr
);
1575 g_free(vdev
->msix
->pending
);
1582 static void vfio_mmap_set_enabled(VFIOPCIDevice
*vdev
, bool enabled
)
1586 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1587 vfio_region_mmaps_set_enabled(&vdev
->bars
[i
].region
, enabled
);
1591 static void vfio_bar_prepare(VFIOPCIDevice
*vdev
, int nr
)
1593 VFIOBAR
*bar
= &vdev
->bars
[nr
];
1598 /* Skip both unimplemented BARs and the upper half of 64bit BARS. */
1599 if (!bar
->region
.size
) {
1603 /* Determine what type of BAR this is for registration */
1604 ret
= pread(vdev
->vbasedev
.fd
, &pci_bar
, sizeof(pci_bar
),
1605 vdev
->config_offset
+ PCI_BASE_ADDRESS_0
+ (4 * nr
));
1606 if (ret
!= sizeof(pci_bar
)) {
1607 error_report("vfio: Failed to read BAR %d (%m)", nr
);
1611 pci_bar
= le32_to_cpu(pci_bar
);
1612 bar
->ioport
= (pci_bar
& PCI_BASE_ADDRESS_SPACE_IO
);
1613 bar
->mem64
= bar
->ioport
? 0 : (pci_bar
& PCI_BASE_ADDRESS_MEM_TYPE_64
);
1614 bar
->type
= pci_bar
& (bar
->ioport
? ~PCI_BASE_ADDRESS_IO_MASK
:
1615 ~PCI_BASE_ADDRESS_MEM_MASK
);
1616 bar
->size
= bar
->region
.size
;
1619 static void vfio_bars_prepare(VFIOPCIDevice
*vdev
)
1623 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1624 vfio_bar_prepare(vdev
, i
);
1628 static void vfio_bar_register(VFIOPCIDevice
*vdev
, int nr
)
1630 VFIOBAR
*bar
= &vdev
->bars
[nr
];
1637 bar
->mr
= g_new0(MemoryRegion
, 1);
1638 name
= g_strdup_printf("%s base BAR %d", vdev
->vbasedev
.name
, nr
);
1639 memory_region_init_io(bar
->mr
, OBJECT(vdev
), NULL
, NULL
, name
, bar
->size
);
1642 if (bar
->region
.size
) {
1643 memory_region_add_subregion(bar
->mr
, 0, bar
->region
.mem
);
1645 if (vfio_region_mmap(&bar
->region
)) {
1646 error_report("Failed to mmap %s BAR %d. Performance may be slow",
1647 vdev
->vbasedev
.name
, nr
);
1651 pci_register_bar(&vdev
->pdev
, nr
, bar
->type
, bar
->mr
);
1654 static void vfio_bars_register(VFIOPCIDevice
*vdev
)
1658 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1659 vfio_bar_register(vdev
, i
);
1663 static void vfio_bars_exit(VFIOPCIDevice
*vdev
)
1667 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1668 VFIOBAR
*bar
= &vdev
->bars
[i
];
1670 vfio_bar_quirk_exit(vdev
, i
);
1671 vfio_region_exit(&bar
->region
);
1672 if (bar
->region
.size
) {
1673 memory_region_del_subregion(bar
->mr
, bar
->region
.mem
);
1678 pci_unregister_vga(&vdev
->pdev
);
1679 vfio_vga_quirk_exit(vdev
);
1683 static void vfio_bars_finalize(VFIOPCIDevice
*vdev
)
1687 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1688 VFIOBAR
*bar
= &vdev
->bars
[i
];
1690 vfio_bar_quirk_finalize(vdev
, i
);
1691 vfio_region_finalize(&bar
->region
);
1693 object_unparent(OBJECT(bar
->mr
));
1699 vfio_vga_quirk_finalize(vdev
);
1700 for (i
= 0; i
< ARRAY_SIZE(vdev
->vga
->region
); i
++) {
1701 object_unparent(OBJECT(&vdev
->vga
->region
[i
].mem
));
1710 static uint8_t vfio_std_cap_max_size(PCIDevice
*pdev
, uint8_t pos
)
1713 uint16_t next
= PCI_CONFIG_SPACE_SIZE
;
1715 for (tmp
= pdev
->config
[PCI_CAPABILITY_LIST
]; tmp
;
1716 tmp
= pdev
->config
[tmp
+ PCI_CAP_LIST_NEXT
]) {
1717 if (tmp
> pos
&& tmp
< next
) {
1726 static uint16_t vfio_ext_cap_max_size(const uint8_t *config
, uint16_t pos
)
1728 uint16_t tmp
, next
= PCIE_CONFIG_SPACE_SIZE
;
1730 for (tmp
= PCI_CONFIG_SPACE_SIZE
; tmp
;
1731 tmp
= PCI_EXT_CAP_NEXT(pci_get_long(config
+ tmp
))) {
1732 if (tmp
> pos
&& tmp
< next
) {
1740 static void vfio_set_word_bits(uint8_t *buf
, uint16_t val
, uint16_t mask
)
1742 pci_set_word(buf
, (pci_get_word(buf
) & ~mask
) | val
);
1745 static void vfio_add_emulated_word(VFIOPCIDevice
*vdev
, int pos
,
1746 uint16_t val
, uint16_t mask
)
1748 vfio_set_word_bits(vdev
->pdev
.config
+ pos
, val
, mask
);
1749 vfio_set_word_bits(vdev
->pdev
.wmask
+ pos
, ~mask
, mask
);
1750 vfio_set_word_bits(vdev
->emulated_config_bits
+ pos
, mask
, mask
);
1753 static void vfio_set_long_bits(uint8_t *buf
, uint32_t val
, uint32_t mask
)
1755 pci_set_long(buf
, (pci_get_long(buf
) & ~mask
) | val
);
1758 static void vfio_add_emulated_long(VFIOPCIDevice
*vdev
, int pos
,
1759 uint32_t val
, uint32_t mask
)
1761 vfio_set_long_bits(vdev
->pdev
.config
+ pos
, val
, mask
);
1762 vfio_set_long_bits(vdev
->pdev
.wmask
+ pos
, ~mask
, mask
);
1763 vfio_set_long_bits(vdev
->emulated_config_bits
+ pos
, mask
, mask
);
1766 static int vfio_setup_pcie_cap(VFIOPCIDevice
*vdev
, int pos
, uint8_t size
,
1772 flags
= pci_get_word(vdev
->pdev
.config
+ pos
+ PCI_CAP_FLAGS
);
1773 type
= (flags
& PCI_EXP_FLAGS_TYPE
) >> 4;
1775 if (type
!= PCI_EXP_TYPE_ENDPOINT
&&
1776 type
!= PCI_EXP_TYPE_LEG_END
&&
1777 type
!= PCI_EXP_TYPE_RC_END
) {
1779 error_setg(errp
, "assignment of PCIe type 0x%x "
1780 "devices is not currently supported", type
);
1784 if (!pci_bus_is_express(pci_get_bus(&vdev
->pdev
))) {
1785 PCIBus
*bus
= pci_get_bus(&vdev
->pdev
);
1789 * Traditionally PCI device assignment exposes the PCIe capability
1790 * as-is on non-express buses. The reason being that some drivers
1791 * simply assume that it's there, for example tg3. However when
1792 * we're running on a native PCIe machine type, like Q35, we need
1793 * to hide the PCIe capability. The reason for this is twofold;
1794 * first Windows guests get a Code 10 error when the PCIe capability
1795 * is exposed in this configuration. Therefore express devices won't
1796 * work at all unless they're attached to express buses in the VM.
1797 * Second, a native PCIe machine introduces the possibility of fine
1798 * granularity IOMMUs supporting both translation and isolation.
1799 * Guest code to discover the IOMMU visibility of a device, such as
1800 * IOMMU grouping code on Linux, is very aware of device types and
1801 * valid transitions between bus types. An express device on a non-
1802 * express bus is not a valid combination on bare metal systems.
1804 * Drivers that require a PCIe capability to make the device
1805 * functional are simply going to need to have their devices placed
1806 * on a PCIe bus in the VM.
1808 while (!pci_bus_is_root(bus
)) {
1809 bridge
= pci_bridge_get_device(bus
);
1810 bus
= pci_get_bus(bridge
);
1813 if (pci_bus_is_express(bus
)) {
1817 } else if (pci_bus_is_root(pci_get_bus(&vdev
->pdev
))) {
1819 * On a Root Complex bus Endpoints become Root Complex Integrated
1820 * Endpoints, which changes the type and clears the LNK & LNK2 fields.
1822 if (type
== PCI_EXP_TYPE_ENDPOINT
) {
1823 vfio_add_emulated_word(vdev
, pos
+ PCI_CAP_FLAGS
,
1824 PCI_EXP_TYPE_RC_END
<< 4,
1825 PCI_EXP_FLAGS_TYPE
);
1827 /* Link Capabilities, Status, and Control goes away */
1828 if (size
> PCI_EXP_LNKCTL
) {
1829 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP
, 0, ~0);
1830 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL
, 0, ~0);
1831 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKSTA
, 0, ~0);
1833 #ifndef PCI_EXP_LNKCAP2
1834 #define PCI_EXP_LNKCAP2 44
1836 #ifndef PCI_EXP_LNKSTA2
1837 #define PCI_EXP_LNKSTA2 50
1839 /* Link 2 Capabilities, Status, and Control goes away */
1840 if (size
> PCI_EXP_LNKCAP2
) {
1841 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP2
, 0, ~0);
1842 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL2
, 0, ~0);
1843 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKSTA2
, 0, ~0);
1847 } else if (type
== PCI_EXP_TYPE_LEG_END
) {
1849 * Legacy endpoints don't belong on the root complex. Windows
1850 * seems to be happier with devices if we skip the capability.
1857 * Convert Root Complex Integrated Endpoints to regular endpoints.
1858 * These devices don't support LNK/LNK2 capabilities, so make them up.
1860 if (type
== PCI_EXP_TYPE_RC_END
) {
1861 vfio_add_emulated_word(vdev
, pos
+ PCI_CAP_FLAGS
,
1862 PCI_EXP_TYPE_ENDPOINT
<< 4,
1863 PCI_EXP_FLAGS_TYPE
);
1864 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP
,
1865 QEMU_PCI_EXP_LNKCAP_MLW(QEMU_PCI_EXP_LNK_X1
) |
1866 QEMU_PCI_EXP_LNKCAP_MLS(QEMU_PCI_EXP_LNK_2_5GT
), ~0);
1867 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL
, 0, ~0);
1872 * Intel 82599 SR-IOV VFs report an invalid PCIe capability version 0
1873 * (Niantic errate #35) causing Windows to error with a Code 10 for the
1874 * device on Q35. Fixup any such devices to report version 1. If we
1875 * were to remove the capability entirely the guest would lose extended
1878 if ((flags
& PCI_EXP_FLAGS_VERS
) == 0) {
1879 vfio_add_emulated_word(vdev
, pos
+ PCI_CAP_FLAGS
,
1880 1, PCI_EXP_FLAGS_VERS
);
1883 pos
= pci_add_capability(&vdev
->pdev
, PCI_CAP_ID_EXP
, pos
, size
,
1889 vdev
->pdev
.exp
.exp_cap
= pos
;
1894 static void vfio_check_pcie_flr(VFIOPCIDevice
*vdev
, uint8_t pos
)
1896 uint32_t cap
= pci_get_long(vdev
->pdev
.config
+ pos
+ PCI_EXP_DEVCAP
);
1898 if (cap
& PCI_EXP_DEVCAP_FLR
) {
1899 trace_vfio_check_pcie_flr(vdev
->vbasedev
.name
);
1900 vdev
->has_flr
= true;
1904 static void vfio_check_pm_reset(VFIOPCIDevice
*vdev
, uint8_t pos
)
1906 uint16_t csr
= pci_get_word(vdev
->pdev
.config
+ pos
+ PCI_PM_CTRL
);
1908 if (!(csr
& PCI_PM_CTRL_NO_SOFT_RESET
)) {
1909 trace_vfio_check_pm_reset(vdev
->vbasedev
.name
);
1910 vdev
->has_pm_reset
= true;
1914 static void vfio_check_af_flr(VFIOPCIDevice
*vdev
, uint8_t pos
)
1916 uint8_t cap
= pci_get_byte(vdev
->pdev
.config
+ pos
+ PCI_AF_CAP
);
1918 if ((cap
& PCI_AF_CAP_TP
) && (cap
& PCI_AF_CAP_FLR
)) {
1919 trace_vfio_check_af_flr(vdev
->vbasedev
.name
);
1920 vdev
->has_flr
= true;
1924 static int vfio_add_std_cap(VFIOPCIDevice
*vdev
, uint8_t pos
, Error
**errp
)
1926 PCIDevice
*pdev
= &vdev
->pdev
;
1927 uint8_t cap_id
, next
, size
;
1930 cap_id
= pdev
->config
[pos
];
1931 next
= pdev
->config
[pos
+ PCI_CAP_LIST_NEXT
];
1934 * If it becomes important to configure capabilities to their actual
1935 * size, use this as the default when it's something we don't recognize.
1936 * Since QEMU doesn't actually handle many of the config accesses,
1937 * exact size doesn't seem worthwhile.
1939 size
= vfio_std_cap_max_size(pdev
, pos
);
1942 * pci_add_capability always inserts the new capability at the head
1943 * of the chain. Therefore to end up with a chain that matches the
1944 * physical device, we insert from the end by making this recursive.
1945 * This is also why we pre-calculate size above as cached config space
1946 * will be changed as we unwind the stack.
1949 ret
= vfio_add_std_cap(vdev
, next
, errp
);
1954 /* Begin the rebuild, use QEMU emulated list bits */
1955 pdev
->config
[PCI_CAPABILITY_LIST
] = 0;
1956 vdev
->emulated_config_bits
[PCI_CAPABILITY_LIST
] = 0xff;
1957 vdev
->emulated_config_bits
[PCI_STATUS
] |= PCI_STATUS_CAP_LIST
;
1959 ret
= vfio_add_virt_caps(vdev
, errp
);
1965 /* Scale down size, esp in case virt caps were added above */
1966 size
= MIN(size
, vfio_std_cap_max_size(pdev
, pos
));
1968 /* Use emulated next pointer to allow dropping caps */
1969 pci_set_byte(vdev
->emulated_config_bits
+ pos
+ PCI_CAP_LIST_NEXT
, 0xff);
1972 case PCI_CAP_ID_MSI
:
1973 ret
= vfio_msi_setup(vdev
, pos
, errp
);
1975 case PCI_CAP_ID_EXP
:
1976 vfio_check_pcie_flr(vdev
, pos
);
1977 ret
= vfio_setup_pcie_cap(vdev
, pos
, size
, errp
);
1979 case PCI_CAP_ID_MSIX
:
1980 ret
= vfio_msix_setup(vdev
, pos
, errp
);
1983 vfio_check_pm_reset(vdev
, pos
);
1985 ret
= pci_add_capability(pdev
, cap_id
, pos
, size
, errp
);
1988 vfio_check_af_flr(vdev
, pos
);
1989 ret
= pci_add_capability(pdev
, cap_id
, pos
, size
, errp
);
1992 ret
= pci_add_capability(pdev
, cap_id
, pos
, size
, errp
);
1998 "failed to add PCI capability 0x%x[0x%x]@0x%x: ",
2006 static void vfio_add_ext_cap(VFIOPCIDevice
*vdev
)
2008 PCIDevice
*pdev
= &vdev
->pdev
;
2010 uint16_t cap_id
, next
, size
;
2014 /* Only add extended caps if we have them and the guest can see them */
2015 if (!pci_is_express(pdev
) || !pci_bus_is_express(pci_get_bus(pdev
)) ||
2016 !pci_get_long(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
)) {
2021 * pcie_add_capability always inserts the new capability at the tail
2022 * of the chain. Therefore to end up with a chain that matches the
2023 * physical device, we cache the config space to avoid overwriting
2024 * the original config space when we parse the extended capabilities.
2026 config
= g_memdup(pdev
->config
, vdev
->config_size
);
2029 * Extended capabilities are chained with each pointing to the next, so we
2030 * can drop anything other than the head of the chain simply by modifying
2031 * the previous next pointer. Seed the head of the chain here such that
2032 * we can simply skip any capabilities we want to drop below, regardless
2033 * of their position in the chain. If this stub capability still exists
2034 * after we add the capabilities we want to expose, update the capability
2035 * ID to zero. Note that we cannot seed with the capability header being
2036 * zero as this conflicts with definition of an absent capability chain
2037 * and prevents capabilities beyond the head of the list from being added.
2038 * By replacing the dummy capability ID with zero after walking the device
2039 * chain, we also transparently mark extended capabilities as absent if
2040 * no capabilities were added. Note that the PCIe spec defines an absence
2041 * of extended capabilities to be determined by a value of zero for the
2042 * capability ID, version, AND next pointer. A non-zero next pointer
2043 * should be sufficient to indicate additional capabilities are present,
2044 * which will occur if we call pcie_add_capability() below. The entire
2045 * first dword is emulated to support this.
2047 * NB. The kernel side does similar masking, so be prepared that our
2048 * view of the device may also contain a capability ID zero in the head
2049 * of the chain. Skip it for the same reason that we cannot seed the
2050 * chain with a zero capability.
2052 pci_set_long(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
,
2053 PCI_EXT_CAP(0xFFFF, 0, 0));
2054 pci_set_long(pdev
->wmask
+ PCI_CONFIG_SPACE_SIZE
, 0);
2055 pci_set_long(vdev
->emulated_config_bits
+ PCI_CONFIG_SPACE_SIZE
, ~0);
2057 for (next
= PCI_CONFIG_SPACE_SIZE
; next
;
2058 next
= PCI_EXT_CAP_NEXT(pci_get_long(config
+ next
))) {
2059 header
= pci_get_long(config
+ next
);
2060 cap_id
= PCI_EXT_CAP_ID(header
);
2061 cap_ver
= PCI_EXT_CAP_VER(header
);
2064 * If it becomes important to configure extended capabilities to their
2065 * actual size, use this as the default when it's something we don't
2066 * recognize. Since QEMU doesn't actually handle many of the config
2067 * accesses, exact size doesn't seem worthwhile.
2069 size
= vfio_ext_cap_max_size(config
, next
);
2071 /* Use emulated next pointer to allow dropping extended caps */
2072 pci_long_test_and_set_mask(vdev
->emulated_config_bits
+ next
,
2073 PCI_EXT_CAP_NEXT_MASK
);
2076 case 0: /* kernel masked capability */
2077 case PCI_EXT_CAP_ID_SRIOV
: /* Read-only VF BARs confuse OVMF */
2078 case PCI_EXT_CAP_ID_ARI
: /* XXX Needs next function virtualization */
2079 case PCI_EXT_CAP_ID_REBAR
: /* Can't expose read-only */
2080 trace_vfio_add_ext_cap_dropped(vdev
->vbasedev
.name
, cap_id
, next
);
2083 pcie_add_capability(pdev
, cap_id
, cap_ver
, next
, size
);
2088 /* Cleanup chain head ID if necessary */
2089 if (pci_get_word(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
) == 0xFFFF) {
2090 pci_set_word(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
, 0);
2097 static int vfio_add_capabilities(VFIOPCIDevice
*vdev
, Error
**errp
)
2099 PCIDevice
*pdev
= &vdev
->pdev
;
2102 if (!(pdev
->config
[PCI_STATUS
] & PCI_STATUS_CAP_LIST
) ||
2103 !pdev
->config
[PCI_CAPABILITY_LIST
]) {
2104 return 0; /* Nothing to add */
2107 ret
= vfio_add_std_cap(vdev
, pdev
->config
[PCI_CAPABILITY_LIST
], errp
);
2112 vfio_add_ext_cap(vdev
);
2116 static void vfio_pci_pre_reset(VFIOPCIDevice
*vdev
)
2118 PCIDevice
*pdev
= &vdev
->pdev
;
2121 vfio_disable_interrupts(vdev
);
2123 /* Make sure the device is in D0 */
2128 pmcsr
= vfio_pci_read_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, 2);
2129 state
= pmcsr
& PCI_PM_CTRL_STATE_MASK
;
2131 pmcsr
&= ~PCI_PM_CTRL_STATE_MASK
;
2132 vfio_pci_write_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, pmcsr
, 2);
2133 /* vfio handles the necessary delay here */
2134 pmcsr
= vfio_pci_read_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, 2);
2135 state
= pmcsr
& PCI_PM_CTRL_STATE_MASK
;
2137 error_report("vfio: Unable to power on device, stuck in D%d",
2144 * Stop any ongoing DMA by disconecting I/O, MMIO, and bus master.
2145 * Also put INTx Disable in known state.
2147 cmd
= vfio_pci_read_config(pdev
, PCI_COMMAND
, 2);
2148 cmd
&= ~(PCI_COMMAND_IO
| PCI_COMMAND_MEMORY
| PCI_COMMAND_MASTER
|
2149 PCI_COMMAND_INTX_DISABLE
);
2150 vfio_pci_write_config(pdev
, PCI_COMMAND
, cmd
, 2);
2153 static void vfio_pci_post_reset(VFIOPCIDevice
*vdev
)
2158 vfio_intx_enable(vdev
, &err
);
2160 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
2163 for (nr
= 0; nr
< PCI_NUM_REGIONS
- 1; ++nr
) {
2164 off_t addr
= vdev
->config_offset
+ PCI_BASE_ADDRESS_0
+ (4 * nr
);
2166 uint32_t len
= sizeof(val
);
2168 if (pwrite(vdev
->vbasedev
.fd
, &val
, len
, addr
) != len
) {
2169 error_report("%s(%s) reset bar %d failed: %m", __func__
,
2170 vdev
->vbasedev
.name
, nr
);
2174 vfio_quirk_reset(vdev
);
2177 static bool vfio_pci_host_match(PCIHostDeviceAddress
*addr
, const char *name
)
2181 sprintf(tmp
, "%04x:%02x:%02x.%1x", addr
->domain
,
2182 addr
->bus
, addr
->slot
, addr
->function
);
2184 return (strcmp(tmp
, name
) == 0);
2187 static int vfio_pci_hot_reset(VFIOPCIDevice
*vdev
, bool single
)
2190 struct vfio_pci_hot_reset_info
*info
;
2191 struct vfio_pci_dependent_device
*devices
;
2192 struct vfio_pci_hot_reset
*reset
;
2197 trace_vfio_pci_hot_reset(vdev
->vbasedev
.name
, single
? "one" : "multi");
2200 vfio_pci_pre_reset(vdev
);
2202 vdev
->vbasedev
.needs_reset
= false;
2204 info
= g_malloc0(sizeof(*info
));
2205 info
->argsz
= sizeof(*info
);
2207 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO
, info
);
2208 if (ret
&& errno
!= ENOSPC
) {
2210 if (!vdev
->has_pm_reset
) {
2211 error_report("vfio: Cannot reset device %s, "
2212 "no available reset mechanism.", vdev
->vbasedev
.name
);
2217 count
= info
->count
;
2218 info
= g_realloc(info
, sizeof(*info
) + (count
* sizeof(*devices
)));
2219 info
->argsz
= sizeof(*info
) + (count
* sizeof(*devices
));
2220 devices
= &info
->devices
[0];
2222 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO
, info
);
2225 error_report("vfio: hot reset info failed: %m");
2229 trace_vfio_pci_hot_reset_has_dep_devices(vdev
->vbasedev
.name
);
2231 /* Verify that we have all the groups required */
2232 for (i
= 0; i
< info
->count
; i
++) {
2233 PCIHostDeviceAddress host
;
2235 VFIODevice
*vbasedev_iter
;
2237 host
.domain
= devices
[i
].segment
;
2238 host
.bus
= devices
[i
].bus
;
2239 host
.slot
= PCI_SLOT(devices
[i
].devfn
);
2240 host
.function
= PCI_FUNC(devices
[i
].devfn
);
2242 trace_vfio_pci_hot_reset_dep_devices(host
.domain
,
2243 host
.bus
, host
.slot
, host
.function
, devices
[i
].group_id
);
2245 if (vfio_pci_host_match(&host
, vdev
->vbasedev
.name
)) {
2249 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2250 if (group
->groupid
== devices
[i
].group_id
) {
2256 if (!vdev
->has_pm_reset
) {
2257 error_report("vfio: Cannot reset device %s, "
2258 "depends on group %d which is not owned.",
2259 vdev
->vbasedev
.name
, devices
[i
].group_id
);
2265 /* Prep dependent devices for reset and clear our marker. */
2266 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
2267 if (!vbasedev_iter
->dev
->realized
||
2268 vbasedev_iter
->type
!= VFIO_DEVICE_TYPE_PCI
) {
2271 tmp
= container_of(vbasedev_iter
, VFIOPCIDevice
, vbasedev
);
2272 if (vfio_pci_host_match(&host
, tmp
->vbasedev
.name
)) {
2277 vfio_pci_pre_reset(tmp
);
2278 tmp
->vbasedev
.needs_reset
= false;
2285 if (!single
&& !multi
) {
2290 /* Determine how many group fds need to be passed */
2292 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2293 for (i
= 0; i
< info
->count
; i
++) {
2294 if (group
->groupid
== devices
[i
].group_id
) {
2301 reset
= g_malloc0(sizeof(*reset
) + (count
* sizeof(*fds
)));
2302 reset
->argsz
= sizeof(*reset
) + (count
* sizeof(*fds
));
2303 fds
= &reset
->group_fds
[0];
2305 /* Fill in group fds */
2306 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2307 for (i
= 0; i
< info
->count
; i
++) {
2308 if (group
->groupid
== devices
[i
].group_id
) {
2309 fds
[reset
->count
++] = group
->fd
;
2316 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_PCI_HOT_RESET
, reset
);
2319 trace_vfio_pci_hot_reset_result(vdev
->vbasedev
.name
,
2320 ret
? "%m" : "Success");
2323 /* Re-enable INTx on affected devices */
2324 for (i
= 0; i
< info
->count
; i
++) {
2325 PCIHostDeviceAddress host
;
2327 VFIODevice
*vbasedev_iter
;
2329 host
.domain
= devices
[i
].segment
;
2330 host
.bus
= devices
[i
].bus
;
2331 host
.slot
= PCI_SLOT(devices
[i
].devfn
);
2332 host
.function
= PCI_FUNC(devices
[i
].devfn
);
2334 if (vfio_pci_host_match(&host
, vdev
->vbasedev
.name
)) {
2338 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2339 if (group
->groupid
== devices
[i
].group_id
) {
2348 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
2349 if (!vbasedev_iter
->dev
->realized
||
2350 vbasedev_iter
->type
!= VFIO_DEVICE_TYPE_PCI
) {
2353 tmp
= container_of(vbasedev_iter
, VFIOPCIDevice
, vbasedev
);
2354 if (vfio_pci_host_match(&host
, tmp
->vbasedev
.name
)) {
2355 vfio_pci_post_reset(tmp
);
2362 vfio_pci_post_reset(vdev
);
2370 * We want to differentiate hot reset of mulitple in-use devices vs hot reset
2371 * of a single in-use device. VFIO_DEVICE_RESET will already handle the case
2372 * of doing hot resets when there is only a single device per bus. The in-use
2373 * here refers to how many VFIODevices are affected. A hot reset that affects
2374 * multiple devices, but only a single in-use device, means that we can call
2375 * it from our bus ->reset() callback since the extent is effectively a single
2376 * device. This allows us to make use of it in the hotplug path. When there
2377 * are multiple in-use devices, we can only trigger the hot reset during a
2378 * system reset and thus from our reset handler. We separate _one vs _multi
2379 * here so that we don't overlap and do a double reset on the system reset
2380 * path where both our reset handler and ->reset() callback are used. Calling
2381 * _one() will only do a hot reset for the one in-use devices case, calling
2382 * _multi() will do nothing if a _one() would have been sufficient.
2384 static int vfio_pci_hot_reset_one(VFIOPCIDevice
*vdev
)
2386 return vfio_pci_hot_reset(vdev
, true);
2389 static int vfio_pci_hot_reset_multi(VFIODevice
*vbasedev
)
2391 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
2392 return vfio_pci_hot_reset(vdev
, false);
2395 static void vfio_pci_compute_needs_reset(VFIODevice
*vbasedev
)
2397 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
2398 if (!vbasedev
->reset_works
|| (!vdev
->has_flr
&& vdev
->has_pm_reset
)) {
2399 vbasedev
->needs_reset
= true;
2403 static VFIODeviceOps vfio_pci_ops
= {
2404 .vfio_compute_needs_reset
= vfio_pci_compute_needs_reset
,
2405 .vfio_hot_reset_multi
= vfio_pci_hot_reset_multi
,
2406 .vfio_eoi
= vfio_intx_eoi
,
2409 int vfio_populate_vga(VFIOPCIDevice
*vdev
, Error
**errp
)
2411 VFIODevice
*vbasedev
= &vdev
->vbasedev
;
2412 struct vfio_region_info
*reg_info
;
2415 ret
= vfio_get_region_info(vbasedev
, VFIO_PCI_VGA_REGION_INDEX
, ®_info
);
2417 error_setg_errno(errp
, -ret
,
2418 "failed getting region info for VGA region index %d",
2419 VFIO_PCI_VGA_REGION_INDEX
);
2423 if (!(reg_info
->flags
& VFIO_REGION_INFO_FLAG_READ
) ||
2424 !(reg_info
->flags
& VFIO_REGION_INFO_FLAG_WRITE
) ||
2425 reg_info
->size
< 0xbffff + 1) {
2426 error_setg(errp
, "unexpected VGA info, flags 0x%lx, size 0x%lx",
2427 (unsigned long)reg_info
->flags
,
2428 (unsigned long)reg_info
->size
);
2433 vdev
->vga
= g_new0(VFIOVGA
, 1);
2435 vdev
->vga
->fd_offset
= reg_info
->offset
;
2436 vdev
->vga
->fd
= vdev
->vbasedev
.fd
;
2440 vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].offset
= QEMU_PCI_VGA_MEM_BASE
;
2441 vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].nr
= QEMU_PCI_VGA_MEM
;
2442 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].quirks
);
2444 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].mem
,
2445 OBJECT(vdev
), &vfio_vga_ops
,
2446 &vdev
->vga
->region
[QEMU_PCI_VGA_MEM
],
2447 "vfio-vga-mmio@0xa0000",
2448 QEMU_PCI_VGA_MEM_SIZE
);
2450 vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].offset
= QEMU_PCI_VGA_IO_LO_BASE
;
2451 vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].nr
= QEMU_PCI_VGA_IO_LO
;
2452 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].quirks
);
2454 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].mem
,
2455 OBJECT(vdev
), &vfio_vga_ops
,
2456 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
],
2457 "vfio-vga-io@0x3b0",
2458 QEMU_PCI_VGA_IO_LO_SIZE
);
2460 vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].offset
= QEMU_PCI_VGA_IO_HI_BASE
;
2461 vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].nr
= QEMU_PCI_VGA_IO_HI
;
2462 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].quirks
);
2464 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].mem
,
2465 OBJECT(vdev
), &vfio_vga_ops
,
2466 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
],
2467 "vfio-vga-io@0x3c0",
2468 QEMU_PCI_VGA_IO_HI_SIZE
);
2470 pci_register_vga(&vdev
->pdev
, &vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].mem
,
2471 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].mem
,
2472 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].mem
);
2477 static void vfio_populate_device(VFIOPCIDevice
*vdev
, Error
**errp
)
2479 VFIODevice
*vbasedev
= &vdev
->vbasedev
;
2480 struct vfio_region_info
*reg_info
;
2481 struct vfio_irq_info irq_info
= { .argsz
= sizeof(irq_info
) };
2484 /* Sanity check device */
2485 if (!(vbasedev
->flags
& VFIO_DEVICE_FLAGS_PCI
)) {
2486 error_setg(errp
, "this isn't a PCI device");
2490 if (vbasedev
->num_regions
< VFIO_PCI_CONFIG_REGION_INDEX
+ 1) {
2491 error_setg(errp
, "unexpected number of io regions %u",
2492 vbasedev
->num_regions
);
2496 if (vbasedev
->num_irqs
< VFIO_PCI_MSIX_IRQ_INDEX
+ 1) {
2497 error_setg(errp
, "unexpected number of irqs %u", vbasedev
->num_irqs
);
2501 for (i
= VFIO_PCI_BAR0_REGION_INDEX
; i
< VFIO_PCI_ROM_REGION_INDEX
; i
++) {
2502 char *name
= g_strdup_printf("%s BAR %d", vbasedev
->name
, i
);
2504 ret
= vfio_region_setup(OBJECT(vdev
), vbasedev
,
2505 &vdev
->bars
[i
].region
, i
, name
);
2509 error_setg_errno(errp
, -ret
, "failed to get region %d info", i
);
2513 QLIST_INIT(&vdev
->bars
[i
].quirks
);
2516 ret
= vfio_get_region_info(vbasedev
,
2517 VFIO_PCI_CONFIG_REGION_INDEX
, ®_info
);
2519 error_setg_errno(errp
, -ret
, "failed to get config info");
2523 trace_vfio_populate_device_config(vdev
->vbasedev
.name
,
2524 (unsigned long)reg_info
->size
,
2525 (unsigned long)reg_info
->offset
,
2526 (unsigned long)reg_info
->flags
);
2528 vdev
->config_size
= reg_info
->size
;
2529 if (vdev
->config_size
== PCI_CONFIG_SPACE_SIZE
) {
2530 vdev
->pdev
.cap_present
&= ~QEMU_PCI_CAP_EXPRESS
;
2532 vdev
->config_offset
= reg_info
->offset
;
2536 if (vdev
->features
& VFIO_FEATURE_ENABLE_VGA
) {
2537 ret
= vfio_populate_vga(vdev
, errp
);
2539 error_append_hint(errp
, "device does not support "
2540 "requested feature x-vga\n");
2545 irq_info
.index
= VFIO_PCI_ERR_IRQ_INDEX
;
2547 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_IRQ_INFO
, &irq_info
);
2549 /* This can fail for an old kernel or legacy PCI dev */
2550 trace_vfio_populate_device_get_irq_info_failure(strerror(errno
));
2551 } else if (irq_info
.count
== 1) {
2552 vdev
->pci_aer
= true;
2554 warn_report(VFIO_MSG_PREFIX
2555 "Could not enable error recovery for the device",
2560 static void vfio_put_device(VFIOPCIDevice
*vdev
)
2562 g_free(vdev
->vbasedev
.name
);
2565 vfio_put_base_device(&vdev
->vbasedev
);
2568 static void vfio_err_notifier_handler(void *opaque
)
2570 VFIOPCIDevice
*vdev
= opaque
;
2572 if (!event_notifier_test_and_clear(&vdev
->err_notifier
)) {
2577 * TBD. Retrieve the error details and decide what action
2578 * needs to be taken. One of the actions could be to pass
2579 * the error to the guest and have the guest driver recover
2580 * from the error. This requires that PCIe capabilities be
2581 * exposed to the guest. For now, we just terminate the
2582 * guest to contain the error.
2585 error_report("%s(%s) Unrecoverable error detected. Please collect any data possible and then kill the guest", __func__
, vdev
->vbasedev
.name
);
2587 vm_stop(RUN_STATE_INTERNAL_ERROR
);
2591 * Registers error notifier for devices supporting error recovery.
2592 * If we encounter a failure in this function, we report an error
2593 * and continue after disabling error recovery support for the
2596 static void vfio_register_err_notifier(VFIOPCIDevice
*vdev
)
2601 if (!vdev
->pci_aer
) {
2605 if (event_notifier_init(&vdev
->err_notifier
, 0)) {
2606 error_report("vfio: Unable to init event notifier for error detection");
2607 vdev
->pci_aer
= false;
2611 fd
= event_notifier_get_fd(&vdev
->err_notifier
);
2612 qemu_set_fd_handler(fd
, vfio_err_notifier_handler
, NULL
, vdev
);
2614 if (vfio_set_irq_signaling(&vdev
->vbasedev
, VFIO_PCI_ERR_IRQ_INDEX
, 0,
2615 VFIO_IRQ_SET_ACTION_TRIGGER
, fd
, &err
)) {
2616 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
2617 qemu_set_fd_handler(fd
, NULL
, NULL
, vdev
);
2618 event_notifier_cleanup(&vdev
->err_notifier
);
2619 vdev
->pci_aer
= false;
2623 static void vfio_unregister_err_notifier(VFIOPCIDevice
*vdev
)
2627 if (!vdev
->pci_aer
) {
2631 if (vfio_set_irq_signaling(&vdev
->vbasedev
, VFIO_PCI_ERR_IRQ_INDEX
, 0,
2632 VFIO_IRQ_SET_ACTION_TRIGGER
, -1, &err
)) {
2633 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
2635 qemu_set_fd_handler(event_notifier_get_fd(&vdev
->err_notifier
),
2637 event_notifier_cleanup(&vdev
->err_notifier
);
2640 static void vfio_req_notifier_handler(void *opaque
)
2642 VFIOPCIDevice
*vdev
= opaque
;
2645 if (!event_notifier_test_and_clear(&vdev
->req_notifier
)) {
2649 qdev_unplug(DEVICE(vdev
), &err
);
2651 warn_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
2655 static void vfio_register_req_notifier(VFIOPCIDevice
*vdev
)
2657 struct vfio_irq_info irq_info
= { .argsz
= sizeof(irq_info
),
2658 .index
= VFIO_PCI_REQ_IRQ_INDEX
};
2662 if (!(vdev
->features
& VFIO_FEATURE_ENABLE_REQ
)) {
2666 if (ioctl(vdev
->vbasedev
.fd
,
2667 VFIO_DEVICE_GET_IRQ_INFO
, &irq_info
) < 0 || irq_info
.count
< 1) {
2671 if (event_notifier_init(&vdev
->req_notifier
, 0)) {
2672 error_report("vfio: Unable to init event notifier for device request");
2676 fd
= event_notifier_get_fd(&vdev
->req_notifier
);
2677 qemu_set_fd_handler(fd
, vfio_req_notifier_handler
, NULL
, vdev
);
2679 if (vfio_set_irq_signaling(&vdev
->vbasedev
, VFIO_PCI_REQ_IRQ_INDEX
, 0,
2680 VFIO_IRQ_SET_ACTION_TRIGGER
, fd
, &err
)) {
2681 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
2682 qemu_set_fd_handler(fd
, NULL
, NULL
, vdev
);
2683 event_notifier_cleanup(&vdev
->req_notifier
);
2685 vdev
->req_enabled
= true;
2689 static void vfio_unregister_req_notifier(VFIOPCIDevice
*vdev
)
2693 if (!vdev
->req_enabled
) {
2697 if (vfio_set_irq_signaling(&vdev
->vbasedev
, VFIO_PCI_REQ_IRQ_INDEX
, 0,
2698 VFIO_IRQ_SET_ACTION_TRIGGER
, -1, &err
)) {
2699 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
2701 qemu_set_fd_handler(event_notifier_get_fd(&vdev
->req_notifier
),
2703 event_notifier_cleanup(&vdev
->req_notifier
);
2705 vdev
->req_enabled
= false;
2708 static void vfio_realize(PCIDevice
*pdev
, Error
**errp
)
2710 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
2711 VFIODevice
*vbasedev_iter
;
2713 char *tmp
, *subsys
, group_path
[PATH_MAX
], *group_name
;
2721 if (!vdev
->vbasedev
.sysfsdev
) {
2722 if (!(~vdev
->host
.domain
|| ~vdev
->host
.bus
||
2723 ~vdev
->host
.slot
|| ~vdev
->host
.function
)) {
2724 error_setg(errp
, "No provided host device");
2725 error_append_hint(errp
, "Use -device vfio-pci,host=DDDD:BB:DD.F "
2726 "or -device vfio-pci,sysfsdev=PATH_TO_DEVICE\n");
2729 vdev
->vbasedev
.sysfsdev
=
2730 g_strdup_printf("/sys/bus/pci/devices/%04x:%02x:%02x.%01x",
2731 vdev
->host
.domain
, vdev
->host
.bus
,
2732 vdev
->host
.slot
, vdev
->host
.function
);
2735 if (stat(vdev
->vbasedev
.sysfsdev
, &st
) < 0) {
2736 error_setg_errno(errp
, errno
, "no such host device");
2737 error_prepend(errp
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.sysfsdev
);
2741 if (!pdev
->failover_pair_id
) {
2742 error_setg(&vdev
->migration_blocker
,
2743 "VFIO device doesn't support migration");
2744 ret
= migrate_add_blocker(vdev
->migration_blocker
, &err
);
2746 error_propagate(errp
, err
);
2747 error_free(vdev
->migration_blocker
);
2748 vdev
->migration_blocker
= NULL
;
2753 vdev
->vbasedev
.name
= g_path_get_basename(vdev
->vbasedev
.sysfsdev
);
2754 vdev
->vbasedev
.ops
= &vfio_pci_ops
;
2755 vdev
->vbasedev
.type
= VFIO_DEVICE_TYPE_PCI
;
2756 vdev
->vbasedev
.dev
= DEVICE(vdev
);
2758 tmp
= g_strdup_printf("%s/iommu_group", vdev
->vbasedev
.sysfsdev
);
2759 len
= readlink(tmp
, group_path
, sizeof(group_path
));
2762 if (len
<= 0 || len
>= sizeof(group_path
)) {
2763 error_setg_errno(errp
, len
< 0 ? errno
: ENAMETOOLONG
,
2764 "no iommu_group found");
2768 group_path
[len
] = 0;
2770 group_name
= basename(group_path
);
2771 if (sscanf(group_name
, "%d", &groupid
) != 1) {
2772 error_setg_errno(errp
, errno
, "failed to read %s", group_path
);
2776 trace_vfio_realize(vdev
->vbasedev
.name
, groupid
);
2778 group
= vfio_get_group(groupid
, pci_device_iommu_address_space(pdev
), errp
);
2783 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
2784 if (strcmp(vbasedev_iter
->name
, vdev
->vbasedev
.name
) == 0) {
2785 error_setg(errp
, "device is already attached");
2786 vfio_put_group(group
);
2792 * Mediated devices *might* operate compatibly with discarding of RAM, but
2793 * we cannot know for certain, it depends on whether the mdev vendor driver
2794 * stays in sync with the active working set of the guest driver. Prevent
2795 * the x-balloon-allowed option unless this is minimally an mdev device.
2797 tmp
= g_strdup_printf("%s/subsystem", vdev
->vbasedev
.sysfsdev
);
2798 subsys
= realpath(tmp
, NULL
);
2800 is_mdev
= subsys
&& (strcmp(subsys
, "/sys/bus/mdev") == 0);
2803 trace_vfio_mdev(vdev
->vbasedev
.name
, is_mdev
);
2805 if (vdev
->vbasedev
.ram_block_discard_allowed
&& !is_mdev
) {
2806 error_setg(errp
, "x-balloon-allowed only potentially compatible "
2807 "with mdev devices");
2808 vfio_put_group(group
);
2812 ret
= vfio_get_device(group
, vdev
->vbasedev
.name
, &vdev
->vbasedev
, errp
);
2814 vfio_put_group(group
);
2818 vfio_populate_device(vdev
, &err
);
2820 error_propagate(errp
, err
);
2824 /* Get a copy of config space */
2825 ret
= pread(vdev
->vbasedev
.fd
, vdev
->pdev
.config
,
2826 MIN(pci_config_size(&vdev
->pdev
), vdev
->config_size
),
2827 vdev
->config_offset
);
2828 if (ret
< (int)MIN(pci_config_size(&vdev
->pdev
), vdev
->config_size
)) {
2829 ret
= ret
< 0 ? -errno
: -EFAULT
;
2830 error_setg_errno(errp
, -ret
, "failed to read device config space");
2834 /* vfio emulates a lot for us, but some bits need extra love */
2835 vdev
->emulated_config_bits
= g_malloc0(vdev
->config_size
);
2837 /* QEMU can choose to expose the ROM or not */
2838 memset(vdev
->emulated_config_bits
+ PCI_ROM_ADDRESS
, 0xff, 4);
2839 /* QEMU can also add or extend BARs */
2840 memset(vdev
->emulated_config_bits
+ PCI_BASE_ADDRESS_0
, 0xff, 6 * 4);
2843 * The PCI spec reserves vendor ID 0xffff as an invalid value. The
2844 * device ID is managed by the vendor and need only be a 16-bit value.
2845 * Allow any 16-bit value for subsystem so they can be hidden or changed.
2847 if (vdev
->vendor_id
!= PCI_ANY_ID
) {
2848 if (vdev
->vendor_id
>= 0xffff) {
2849 error_setg(errp
, "invalid PCI vendor ID provided");
2852 vfio_add_emulated_word(vdev
, PCI_VENDOR_ID
, vdev
->vendor_id
, ~0);
2853 trace_vfio_pci_emulated_vendor_id(vdev
->vbasedev
.name
, vdev
->vendor_id
);
2855 vdev
->vendor_id
= pci_get_word(pdev
->config
+ PCI_VENDOR_ID
);
2858 if (vdev
->device_id
!= PCI_ANY_ID
) {
2859 if (vdev
->device_id
> 0xffff) {
2860 error_setg(errp
, "invalid PCI device ID provided");
2863 vfio_add_emulated_word(vdev
, PCI_DEVICE_ID
, vdev
->device_id
, ~0);
2864 trace_vfio_pci_emulated_device_id(vdev
->vbasedev
.name
, vdev
->device_id
);
2866 vdev
->device_id
= pci_get_word(pdev
->config
+ PCI_DEVICE_ID
);
2869 if (vdev
->sub_vendor_id
!= PCI_ANY_ID
) {
2870 if (vdev
->sub_vendor_id
> 0xffff) {
2871 error_setg(errp
, "invalid PCI subsystem vendor ID provided");
2874 vfio_add_emulated_word(vdev
, PCI_SUBSYSTEM_VENDOR_ID
,
2875 vdev
->sub_vendor_id
, ~0);
2876 trace_vfio_pci_emulated_sub_vendor_id(vdev
->vbasedev
.name
,
2877 vdev
->sub_vendor_id
);
2880 if (vdev
->sub_device_id
!= PCI_ANY_ID
) {
2881 if (vdev
->sub_device_id
> 0xffff) {
2882 error_setg(errp
, "invalid PCI subsystem device ID provided");
2885 vfio_add_emulated_word(vdev
, PCI_SUBSYSTEM_ID
, vdev
->sub_device_id
, ~0);
2886 trace_vfio_pci_emulated_sub_device_id(vdev
->vbasedev
.name
,
2887 vdev
->sub_device_id
);
2890 /* QEMU can change multi-function devices to single function, or reverse */
2891 vdev
->emulated_config_bits
[PCI_HEADER_TYPE
] =
2892 PCI_HEADER_TYPE_MULTI_FUNCTION
;
2894 /* Restore or clear multifunction, this is always controlled by QEMU */
2895 if (vdev
->pdev
.cap_present
& QEMU_PCI_CAP_MULTIFUNCTION
) {
2896 vdev
->pdev
.config
[PCI_HEADER_TYPE
] |= PCI_HEADER_TYPE_MULTI_FUNCTION
;
2898 vdev
->pdev
.config
[PCI_HEADER_TYPE
] &= ~PCI_HEADER_TYPE_MULTI_FUNCTION
;
2902 * Clear host resource mapping info. If we choose not to register a
2903 * BAR, such as might be the case with the option ROM, we can get
2904 * confusing, unwritable, residual addresses from the host here.
2906 memset(&vdev
->pdev
.config
[PCI_BASE_ADDRESS_0
], 0, 24);
2907 memset(&vdev
->pdev
.config
[PCI_ROM_ADDRESS
], 0, 4);
2909 vfio_pci_size_rom(vdev
);
2911 vfio_bars_prepare(vdev
);
2913 vfio_msix_early_setup(vdev
, &err
);
2915 error_propagate(errp
, err
);
2919 vfio_bars_register(vdev
);
2921 ret
= vfio_add_capabilities(vdev
, errp
);
2927 vfio_vga_quirk_setup(vdev
);
2930 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
2931 vfio_bar_quirk_setup(vdev
, i
);
2934 if (!vdev
->igd_opregion
&&
2935 vdev
->features
& VFIO_FEATURE_ENABLE_IGD_OPREGION
) {
2936 struct vfio_region_info
*opregion
;
2938 if (vdev
->pdev
.qdev
.hotplugged
) {
2940 "cannot support IGD OpRegion feature on hotplugged "
2945 ret
= vfio_get_dev_region_info(&vdev
->vbasedev
,
2946 VFIO_REGION_TYPE_PCI_VENDOR_TYPE
| PCI_VENDOR_ID_INTEL
,
2947 VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION
, &opregion
);
2949 error_setg_errno(errp
, -ret
,
2950 "does not support requested IGD OpRegion feature");
2954 ret
= vfio_pci_igd_opregion_init(vdev
, opregion
, errp
);
2961 /* QEMU emulates all of MSI & MSIX */
2962 if (pdev
->cap_present
& QEMU_PCI_CAP_MSIX
) {
2963 memset(vdev
->emulated_config_bits
+ pdev
->msix_cap
, 0xff,
2967 if (pdev
->cap_present
& QEMU_PCI_CAP_MSI
) {
2968 memset(vdev
->emulated_config_bits
+ pdev
->msi_cap
, 0xff,
2969 vdev
->msi_cap_size
);
2972 if (vfio_pci_read_config(&vdev
->pdev
, PCI_INTERRUPT_PIN
, 1)) {
2973 vdev
->intx
.mmap_timer
= timer_new_ms(QEMU_CLOCK_VIRTUAL
,
2974 vfio_intx_mmap_enable
, vdev
);
2975 pci_device_set_intx_routing_notifier(&vdev
->pdev
,
2976 vfio_intx_routing_notifier
);
2977 vdev
->irqchip_change_notifier
.notify
= vfio_irqchip_change
;
2978 kvm_irqchip_add_change_notifier(&vdev
->irqchip_change_notifier
);
2979 ret
= vfio_intx_enable(vdev
, errp
);
2981 goto out_deregister
;
2985 if (vdev
->display
!= ON_OFF_AUTO_OFF
) {
2986 ret
= vfio_display_probe(vdev
, errp
);
2988 goto out_deregister
;
2991 if (vdev
->enable_ramfb
&& vdev
->dpy
== NULL
) {
2992 error_setg(errp
, "ramfb=on requires display=on");
2993 goto out_deregister
;
2995 if (vdev
->display_xres
|| vdev
->display_yres
) {
2996 if (vdev
->dpy
== NULL
) {
2997 error_setg(errp
, "xres and yres properties require display=on");
2998 goto out_deregister
;
3000 if (vdev
->dpy
->edid_regs
== NULL
) {
3001 error_setg(errp
, "xres and yres properties need edid support");
3002 goto out_deregister
;
3006 if (vdev
->vendor_id
== PCI_VENDOR_ID_NVIDIA
) {
3007 ret
= vfio_pci_nvidia_v100_ram_init(vdev
, errp
);
3008 if (ret
&& ret
!= -ENODEV
) {
3009 error_report("Failed to setup NVIDIA V100 GPU RAM");
3013 if (vdev
->vendor_id
== PCI_VENDOR_ID_IBM
) {
3014 ret
= vfio_pci_nvlink2_init(vdev
, errp
);
3015 if (ret
&& ret
!= -ENODEV
) {
3016 error_report("Failed to setup NVlink2 bridge");
3020 vfio_register_err_notifier(vdev
);
3021 vfio_register_req_notifier(vdev
);
3022 vfio_setup_resetfn_quirk(vdev
);
3027 pci_device_set_intx_routing_notifier(&vdev
->pdev
, NULL
);
3028 kvm_irqchip_remove_change_notifier(&vdev
->irqchip_change_notifier
);
3030 vfio_teardown_msi(vdev
);
3031 vfio_bars_exit(vdev
);
3033 error_prepend(errp
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
3034 if (vdev
->migration_blocker
) {
3035 migrate_del_blocker(vdev
->migration_blocker
);
3036 error_free(vdev
->migration_blocker
);
3037 vdev
->migration_blocker
= NULL
;
3041 static void vfio_instance_finalize(Object
*obj
)
3043 VFIOPCIDevice
*vdev
= PCI_VFIO(obj
);
3044 VFIOGroup
*group
= vdev
->vbasedev
.group
;
3046 vfio_display_finalize(vdev
);
3047 vfio_bars_finalize(vdev
);
3048 g_free(vdev
->emulated_config_bits
);
3050 if (vdev
->migration_blocker
) {
3051 migrate_del_blocker(vdev
->migration_blocker
);
3052 error_free(vdev
->migration_blocker
);
3055 * XXX Leaking igd_opregion is not an oversight, we can't remove the
3056 * fw_cfg entry therefore leaking this allocation seems like the safest
3059 * g_free(vdev->igd_opregion);
3061 vfio_put_device(vdev
);
3062 vfio_put_group(group
);
3065 static void vfio_exitfn(PCIDevice
*pdev
)
3067 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
3069 vfio_unregister_req_notifier(vdev
);
3070 vfio_unregister_err_notifier(vdev
);
3071 pci_device_set_intx_routing_notifier(&vdev
->pdev
, NULL
);
3072 if (vdev
->irqchip_change_notifier
.notify
) {
3073 kvm_irqchip_remove_change_notifier(&vdev
->irqchip_change_notifier
);
3075 vfio_disable_interrupts(vdev
);
3076 if (vdev
->intx
.mmap_timer
) {
3077 timer_free(vdev
->intx
.mmap_timer
);
3079 vfio_teardown_msi(vdev
);
3080 vfio_bars_exit(vdev
);
3083 static void vfio_pci_reset(DeviceState
*dev
)
3085 VFIOPCIDevice
*vdev
= PCI_VFIO(dev
);
3087 trace_vfio_pci_reset(vdev
->vbasedev
.name
);
3089 vfio_pci_pre_reset(vdev
);
3091 if (vdev
->display
!= ON_OFF_AUTO_OFF
) {
3092 vfio_display_reset(vdev
);
3095 if (vdev
->resetfn
&& !vdev
->resetfn(vdev
)) {
3099 if (vdev
->vbasedev
.reset_works
&&
3100 (vdev
->has_flr
|| !vdev
->has_pm_reset
) &&
3101 !ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_RESET
)) {
3102 trace_vfio_pci_reset_flr(vdev
->vbasedev
.name
);
3106 /* See if we can do our own bus reset */
3107 if (!vfio_pci_hot_reset_one(vdev
)) {
3111 /* If nothing else works and the device supports PM reset, use it */
3112 if (vdev
->vbasedev
.reset_works
&& vdev
->has_pm_reset
&&
3113 !ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_RESET
)) {
3114 trace_vfio_pci_reset_pm(vdev
->vbasedev
.name
);
3119 vfio_pci_post_reset(vdev
);
3122 static void vfio_instance_init(Object
*obj
)
3124 PCIDevice
*pci_dev
= PCI_DEVICE(obj
);
3125 VFIOPCIDevice
*vdev
= PCI_VFIO(obj
);
3127 device_add_bootindex_property(obj
, &vdev
->bootindex
,
3130 vdev
->host
.domain
= ~0U;
3131 vdev
->host
.bus
= ~0U;
3132 vdev
->host
.slot
= ~0U;
3133 vdev
->host
.function
= ~0U;
3135 vdev
->nv_gpudirect_clique
= 0xFF;
3137 /* QEMU_PCI_CAP_EXPRESS initialization does not depend on QEMU command
3138 * line, therefore, no need to wait to realize like other devices */
3139 pci_dev
->cap_present
|= QEMU_PCI_CAP_EXPRESS
;
3142 static Property vfio_pci_dev_properties
[] = {
3143 DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice
, host
),
3144 DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice
, vbasedev
.sysfsdev
),
3145 DEFINE_PROP_ON_OFF_AUTO("display", VFIOPCIDevice
,
3146 display
, ON_OFF_AUTO_OFF
),
3147 DEFINE_PROP_UINT32("xres", VFIOPCIDevice
, display_xres
, 0),
3148 DEFINE_PROP_UINT32("yres", VFIOPCIDevice
, display_yres
, 0),
3149 DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIOPCIDevice
,
3150 intx
.mmap_timeout
, 1100),
3151 DEFINE_PROP_BIT("x-vga", VFIOPCIDevice
, features
,
3152 VFIO_FEATURE_ENABLE_VGA_BIT
, false),
3153 DEFINE_PROP_BIT("x-req", VFIOPCIDevice
, features
,
3154 VFIO_FEATURE_ENABLE_REQ_BIT
, true),
3155 DEFINE_PROP_BIT("x-igd-opregion", VFIOPCIDevice
, features
,
3156 VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT
, false),
3157 DEFINE_PROP_BOOL("x-no-mmap", VFIOPCIDevice
, vbasedev
.no_mmap
, false),
3158 DEFINE_PROP_BOOL("x-balloon-allowed", VFIOPCIDevice
,
3159 vbasedev
.ram_block_discard_allowed
, false),
3160 DEFINE_PROP_BOOL("x-no-kvm-intx", VFIOPCIDevice
, no_kvm_intx
, false),
3161 DEFINE_PROP_BOOL("x-no-kvm-msi", VFIOPCIDevice
, no_kvm_msi
, false),
3162 DEFINE_PROP_BOOL("x-no-kvm-msix", VFIOPCIDevice
, no_kvm_msix
, false),
3163 DEFINE_PROP_BOOL("x-no-geforce-quirks", VFIOPCIDevice
,
3164 no_geforce_quirks
, false),
3165 DEFINE_PROP_BOOL("x-no-kvm-ioeventfd", VFIOPCIDevice
, no_kvm_ioeventfd
,
3167 DEFINE_PROP_BOOL("x-no-vfio-ioeventfd", VFIOPCIDevice
, no_vfio_ioeventfd
,
3169 DEFINE_PROP_UINT32("x-pci-vendor-id", VFIOPCIDevice
, vendor_id
, PCI_ANY_ID
),
3170 DEFINE_PROP_UINT32("x-pci-device-id", VFIOPCIDevice
, device_id
, PCI_ANY_ID
),
3171 DEFINE_PROP_UINT32("x-pci-sub-vendor-id", VFIOPCIDevice
,
3172 sub_vendor_id
, PCI_ANY_ID
),
3173 DEFINE_PROP_UINT32("x-pci-sub-device-id", VFIOPCIDevice
,
3174 sub_device_id
, PCI_ANY_ID
),
3175 DEFINE_PROP_UINT32("x-igd-gms", VFIOPCIDevice
, igd_gms
, 0),
3176 DEFINE_PROP_UNSIGNED_NODEFAULT("x-nv-gpudirect-clique", VFIOPCIDevice
,
3177 nv_gpudirect_clique
,
3178 qdev_prop_nv_gpudirect_clique
, uint8_t),
3179 DEFINE_PROP_OFF_AUTO_PCIBAR("x-msix-relocation", VFIOPCIDevice
, msix_relo
,
3180 OFF_AUTOPCIBAR_OFF
),
3182 * TODO - support passed fds... is this necessary?
3183 * DEFINE_PROP_STRING("vfiofd", VFIOPCIDevice, vfiofd_name),
3184 * DEFINE_PROP_STRING("vfiogroupfd, VFIOPCIDevice, vfiogroupfd_name),
3186 DEFINE_PROP_END_OF_LIST(),
3189 static void vfio_pci_dev_class_init(ObjectClass
*klass
, void *data
)
3191 DeviceClass
*dc
= DEVICE_CLASS(klass
);
3192 PCIDeviceClass
*pdc
= PCI_DEVICE_CLASS(klass
);
3194 dc
->reset
= vfio_pci_reset
;
3195 device_class_set_props(dc
, vfio_pci_dev_properties
);
3196 dc
->desc
= "VFIO-based PCI device assignment";
3197 set_bit(DEVICE_CATEGORY_MISC
, dc
->categories
);
3198 pdc
->realize
= vfio_realize
;
3199 pdc
->exit
= vfio_exitfn
;
3200 pdc
->config_read
= vfio_pci_read_config
;
3201 pdc
->config_write
= vfio_pci_write_config
;
3204 static const TypeInfo vfio_pci_dev_info
= {
3205 .name
= TYPE_VFIO_PCI
,
3206 .parent
= TYPE_PCI_DEVICE
,
3207 .instance_size
= sizeof(VFIOPCIDevice
),
3208 .class_init
= vfio_pci_dev_class_init
,
3209 .instance_init
= vfio_instance_init
,
3210 .instance_finalize
= vfio_instance_finalize
,
3211 .interfaces
= (InterfaceInfo
[]) {
3212 { INTERFACE_PCIE_DEVICE
},
3213 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
3218 static Property vfio_pci_dev_nohotplug_properties
[] = {
3219 DEFINE_PROP_BOOL("ramfb", VFIOPCIDevice
, enable_ramfb
, false),
3220 DEFINE_PROP_END_OF_LIST(),
3223 static void vfio_pci_nohotplug_dev_class_init(ObjectClass
*klass
, void *data
)
3225 DeviceClass
*dc
= DEVICE_CLASS(klass
);
3227 device_class_set_props(dc
, vfio_pci_dev_nohotplug_properties
);
3228 dc
->hotpluggable
= false;
3231 static const TypeInfo vfio_pci_nohotplug_dev_info
= {
3232 .name
= TYPE_VFIO_PCI_NOHOTPLUG
,
3233 .parent
= TYPE_VFIO_PCI
,
3234 .instance_size
= sizeof(VFIOPCIDevice
),
3235 .class_init
= vfio_pci_nohotplug_dev_class_init
,
3238 static void register_vfio_pci_dev_type(void)
3240 type_register_static(&vfio_pci_dev_info
);
3241 type_register_static(&vfio_pci_nohotplug_dev_info
);
3244 type_init(register_vfio_pci_dev_type
)