4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qapi/error.h"
24 #include "qemu/cutils.h"
26 #include "exec/exec-all.h"
27 #include "exec/target_page.h"
29 #include "hw/qdev-core.h"
30 #include "hw/qdev-properties.h"
31 #if !defined(CONFIG_USER_ONLY)
32 #include "hw/boards.h"
33 #include "hw/xen/xen.h"
35 #include "sysemu/kvm.h"
36 #include "sysemu/sysemu.h"
37 #include "sysemu/tcg.h"
38 #include "qemu/timer.h"
39 #include "qemu/config-file.h"
40 #include "qemu/error-report.h"
41 #include "qemu/qemu-print.h"
42 #if defined(CONFIG_USER_ONLY)
44 #else /* !CONFIG_USER_ONLY */
45 #include "exec/memory.h"
46 #include "exec/ioport.h"
47 #include "sysemu/dma.h"
48 #include "sysemu/hostmem.h"
49 #include "sysemu/hw_accel.h"
50 #include "exec/address-spaces.h"
51 #include "sysemu/xen-mapcache.h"
52 #include "trace-root.h"
54 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
55 #include <linux/falloc.h>
59 #include "qemu/rcu_queue.h"
60 #include "qemu/main-loop.h"
61 #include "translate-all.h"
62 #include "sysemu/replay.h"
64 #include "exec/memory-internal.h"
65 #include "exec/ram_addr.h"
68 #include "migration/vmstate.h"
70 #include "qemu/range.h"
72 #include "qemu/mmap-alloc.h"
75 #include "monitor/monitor.h"
77 //#define DEBUG_SUBPAGE
79 #if !defined(CONFIG_USER_ONLY)
80 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
81 * are protected by the ramlist lock.
83 RAMList ram_list
= { .blocks
= QLIST_HEAD_INITIALIZER(ram_list
.blocks
) };
85 static MemoryRegion
*system_memory
;
86 static MemoryRegion
*system_io
;
88 AddressSpace address_space_io
;
89 AddressSpace address_space_memory
;
91 static MemoryRegion io_mem_unassigned
;
94 #ifdef TARGET_PAGE_BITS_VARY
96 bool target_page_bits_decided
;
99 CPUTailQ cpus
= QTAILQ_HEAD_INITIALIZER(cpus
);
101 /* current CPU in the current thread. It is only valid inside
103 __thread CPUState
*current_cpu
;
104 /* 0 = Do not count executed instructions.
105 1 = Precise instruction counting.
106 2 = Adaptive rate instruction counting. */
109 uintptr_t qemu_host_page_size
;
110 intptr_t qemu_host_page_mask
;
112 bool set_preferred_target_page_bits(int bits
)
114 /* The target page size is the lowest common denominator for all
115 * the CPUs in the system, so we can only make it smaller, never
116 * larger. And we can't make it smaller once we've committed to
119 #ifdef TARGET_PAGE_BITS_VARY
120 assert(bits
>= TARGET_PAGE_BITS_MIN
);
121 if (target_page_bits
== 0 || target_page_bits
> bits
) {
122 if (target_page_bits_decided
) {
125 target_page_bits
= bits
;
131 #if !defined(CONFIG_USER_ONLY)
133 static void finalize_target_page_bits(void)
135 #ifdef TARGET_PAGE_BITS_VARY
136 if (target_page_bits
== 0) {
137 target_page_bits
= TARGET_PAGE_BITS_MIN
;
139 target_page_bits_decided
= true;
143 typedef struct PhysPageEntry PhysPageEntry
;
145 struct PhysPageEntry
{
146 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
148 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
152 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
154 /* Size of the L2 (and L3, etc) page tables. */
155 #define ADDR_SPACE_BITS 64
158 #define P_L2_SIZE (1 << P_L2_BITS)
160 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
162 typedef PhysPageEntry Node
[P_L2_SIZE
];
164 typedef struct PhysPageMap
{
167 unsigned sections_nb
;
168 unsigned sections_nb_alloc
;
170 unsigned nodes_nb_alloc
;
172 MemoryRegionSection
*sections
;
175 struct AddressSpaceDispatch
{
176 MemoryRegionSection
*mru_section
;
177 /* This is a multi-level map on the physical address space.
178 * The bottom level has pointers to MemoryRegionSections.
180 PhysPageEntry phys_map
;
184 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
185 typedef struct subpage_t
{
189 uint16_t sub_section
[];
192 #define PHYS_SECTION_UNASSIGNED 0
194 static void io_mem_init(void);
195 static void memory_map_init(void);
196 static void tcg_log_global_after_sync(MemoryListener
*listener
);
197 static void tcg_commit(MemoryListener
*listener
);
200 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
201 * @cpu: the CPU whose AddressSpace this is
202 * @as: the AddressSpace itself
203 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
204 * @tcg_as_listener: listener for tracking changes to the AddressSpace
206 struct CPUAddressSpace
{
209 struct AddressSpaceDispatch
*memory_dispatch
;
210 MemoryListener tcg_as_listener
;
213 struct DirtyBitmapSnapshot
{
216 unsigned long dirty
[];
221 #if !defined(CONFIG_USER_ONLY)
223 static void phys_map_node_reserve(PhysPageMap
*map
, unsigned nodes
)
225 static unsigned alloc_hint
= 16;
226 if (map
->nodes_nb
+ nodes
> map
->nodes_nb_alloc
) {
227 map
->nodes_nb_alloc
= MAX(alloc_hint
, map
->nodes_nb
+ nodes
);
228 map
->nodes
= g_renew(Node
, map
->nodes
, map
->nodes_nb_alloc
);
229 alloc_hint
= map
->nodes_nb_alloc
;
233 static uint32_t phys_map_node_alloc(PhysPageMap
*map
, bool leaf
)
240 ret
= map
->nodes_nb
++;
242 assert(ret
!= PHYS_MAP_NODE_NIL
);
243 assert(ret
!= map
->nodes_nb_alloc
);
245 e
.skip
= leaf
? 0 : 1;
246 e
.ptr
= leaf
? PHYS_SECTION_UNASSIGNED
: PHYS_MAP_NODE_NIL
;
247 for (i
= 0; i
< P_L2_SIZE
; ++i
) {
248 memcpy(&p
[i
], &e
, sizeof(e
));
253 static void phys_page_set_level(PhysPageMap
*map
, PhysPageEntry
*lp
,
254 hwaddr
*index
, uint64_t *nb
, uint16_t leaf
,
258 hwaddr step
= (hwaddr
)1 << (level
* P_L2_BITS
);
260 if (lp
->skip
&& lp
->ptr
== PHYS_MAP_NODE_NIL
) {
261 lp
->ptr
= phys_map_node_alloc(map
, level
== 0);
263 p
= map
->nodes
[lp
->ptr
];
264 lp
= &p
[(*index
>> (level
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
266 while (*nb
&& lp
< &p
[P_L2_SIZE
]) {
267 if ((*index
& (step
- 1)) == 0 && *nb
>= step
) {
273 phys_page_set_level(map
, lp
, index
, nb
, leaf
, level
- 1);
279 static void phys_page_set(AddressSpaceDispatch
*d
,
280 hwaddr index
, uint64_t nb
,
283 /* Wildly overreserve - it doesn't matter much. */
284 phys_map_node_reserve(&d
->map
, 3 * P_L2_LEVELS
);
286 phys_page_set_level(&d
->map
, &d
->phys_map
, &index
, &nb
, leaf
, P_L2_LEVELS
- 1);
289 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
290 * and update our entry so we can skip it and go directly to the destination.
292 static void phys_page_compact(PhysPageEntry
*lp
, Node
*nodes
)
294 unsigned valid_ptr
= P_L2_SIZE
;
299 if (lp
->ptr
== PHYS_MAP_NODE_NIL
) {
304 for (i
= 0; i
< P_L2_SIZE
; i
++) {
305 if (p
[i
].ptr
== PHYS_MAP_NODE_NIL
) {
312 phys_page_compact(&p
[i
], nodes
);
316 /* We can only compress if there's only one child. */
321 assert(valid_ptr
< P_L2_SIZE
);
323 /* Don't compress if it won't fit in the # of bits we have. */
324 if (P_L2_LEVELS
>= (1 << 6) &&
325 lp
->skip
+ p
[valid_ptr
].skip
>= (1 << 6)) {
329 lp
->ptr
= p
[valid_ptr
].ptr
;
330 if (!p
[valid_ptr
].skip
) {
331 /* If our only child is a leaf, make this a leaf. */
332 /* By design, we should have made this node a leaf to begin with so we
333 * should never reach here.
334 * But since it's so simple to handle this, let's do it just in case we
339 lp
->skip
+= p
[valid_ptr
].skip
;
343 void address_space_dispatch_compact(AddressSpaceDispatch
*d
)
345 if (d
->phys_map
.skip
) {
346 phys_page_compact(&d
->phys_map
, d
->map
.nodes
);
350 static inline bool section_covers_addr(const MemoryRegionSection
*section
,
353 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
354 * the section must cover the entire address space.
356 return int128_gethi(section
->size
) ||
357 range_covers_byte(section
->offset_within_address_space
,
358 int128_getlo(section
->size
), addr
);
361 static MemoryRegionSection
*phys_page_find(AddressSpaceDispatch
*d
, hwaddr addr
)
363 PhysPageEntry lp
= d
->phys_map
, *p
;
364 Node
*nodes
= d
->map
.nodes
;
365 MemoryRegionSection
*sections
= d
->map
.sections
;
366 hwaddr index
= addr
>> TARGET_PAGE_BITS
;
369 for (i
= P_L2_LEVELS
; lp
.skip
&& (i
-= lp
.skip
) >= 0;) {
370 if (lp
.ptr
== PHYS_MAP_NODE_NIL
) {
371 return §ions
[PHYS_SECTION_UNASSIGNED
];
374 lp
= p
[(index
>> (i
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
377 if (section_covers_addr(§ions
[lp
.ptr
], addr
)) {
378 return §ions
[lp
.ptr
];
380 return §ions
[PHYS_SECTION_UNASSIGNED
];
384 /* Called from RCU critical section */
385 static MemoryRegionSection
*address_space_lookup_region(AddressSpaceDispatch
*d
,
387 bool resolve_subpage
)
389 MemoryRegionSection
*section
= atomic_read(&d
->mru_section
);
392 if (!section
|| section
== &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
] ||
393 !section_covers_addr(section
, addr
)) {
394 section
= phys_page_find(d
, addr
);
395 atomic_set(&d
->mru_section
, section
);
397 if (resolve_subpage
&& section
->mr
->subpage
) {
398 subpage
= container_of(section
->mr
, subpage_t
, iomem
);
399 section
= &d
->map
.sections
[subpage
->sub_section
[SUBPAGE_IDX(addr
)]];
404 /* Called from RCU critical section */
405 static MemoryRegionSection
*
406 address_space_translate_internal(AddressSpaceDispatch
*d
, hwaddr addr
, hwaddr
*xlat
,
407 hwaddr
*plen
, bool resolve_subpage
)
409 MemoryRegionSection
*section
;
413 section
= address_space_lookup_region(d
, addr
, resolve_subpage
);
414 /* Compute offset within MemoryRegionSection */
415 addr
-= section
->offset_within_address_space
;
417 /* Compute offset within MemoryRegion */
418 *xlat
= addr
+ section
->offset_within_region
;
422 /* MMIO registers can be expected to perform full-width accesses based only
423 * on their address, without considering adjacent registers that could
424 * decode to completely different MemoryRegions. When such registers
425 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
426 * regions overlap wildly. For this reason we cannot clamp the accesses
429 * If the length is small (as is the case for address_space_ldl/stl),
430 * everything works fine. If the incoming length is large, however,
431 * the caller really has to do the clamping through memory_access_size.
433 if (memory_region_is_ram(mr
)) {
434 diff
= int128_sub(section
->size
, int128_make64(addr
));
435 *plen
= int128_get64(int128_min(diff
, int128_make64(*plen
)));
441 * address_space_translate_iommu - translate an address through an IOMMU
442 * memory region and then through the target address space.
444 * @iommu_mr: the IOMMU memory region that we start the translation from
445 * @addr: the address to be translated through the MMU
446 * @xlat: the translated address offset within the destination memory region.
447 * It cannot be %NULL.
448 * @plen_out: valid read/write length of the translated address. It
450 * @page_mask_out: page mask for the translated address. This
451 * should only be meaningful for IOMMU translated
452 * addresses, since there may be huge pages that this bit
453 * would tell. It can be %NULL if we don't care about it.
454 * @is_write: whether the translation operation is for write
455 * @is_mmio: whether this can be MMIO, set true if it can
456 * @target_as: the address space targeted by the IOMMU
457 * @attrs: transaction attributes
459 * This function is called from RCU critical section. It is the common
460 * part of flatview_do_translate and address_space_translate_cached.
462 static MemoryRegionSection
address_space_translate_iommu(IOMMUMemoryRegion
*iommu_mr
,
465 hwaddr
*page_mask_out
,
468 AddressSpace
**target_as
,
471 MemoryRegionSection
*section
;
472 hwaddr page_mask
= (hwaddr
)-1;
476 IOMMUMemoryRegionClass
*imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
480 if (imrc
->attrs_to_index
) {
481 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
484 iotlb
= imrc
->translate(iommu_mr
, addr
, is_write
?
485 IOMMU_WO
: IOMMU_RO
, iommu_idx
);
487 if (!(iotlb
.perm
& (1 << is_write
))) {
491 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
492 | (addr
& iotlb
.addr_mask
));
493 page_mask
&= iotlb
.addr_mask
;
494 *plen_out
= MIN(*plen_out
, (addr
| iotlb
.addr_mask
) - addr
+ 1);
495 *target_as
= iotlb
.target_as
;
497 section
= address_space_translate_internal(
498 address_space_to_dispatch(iotlb
.target_as
), addr
, xlat
,
501 iommu_mr
= memory_region_get_iommu(section
->mr
);
502 } while (unlikely(iommu_mr
));
505 *page_mask_out
= page_mask
;
510 return (MemoryRegionSection
) { .mr
= &io_mem_unassigned
};
514 * flatview_do_translate - translate an address in FlatView
516 * @fv: the flat view that we want to translate on
517 * @addr: the address to be translated in above address space
518 * @xlat: the translated address offset within memory region. It
520 * @plen_out: valid read/write length of the translated address. It
521 * can be @NULL when we don't care about it.
522 * @page_mask_out: page mask for the translated address. This
523 * should only be meaningful for IOMMU translated
524 * addresses, since there may be huge pages that this bit
525 * would tell. It can be @NULL if we don't care about it.
526 * @is_write: whether the translation operation is for write
527 * @is_mmio: whether this can be MMIO, set true if it can
528 * @target_as: the address space targeted by the IOMMU
529 * @attrs: memory transaction attributes
531 * This function is called from RCU critical section
533 static MemoryRegionSection
flatview_do_translate(FlatView
*fv
,
537 hwaddr
*page_mask_out
,
540 AddressSpace
**target_as
,
543 MemoryRegionSection
*section
;
544 IOMMUMemoryRegion
*iommu_mr
;
545 hwaddr plen
= (hwaddr
)(-1);
551 section
= address_space_translate_internal(
552 flatview_to_dispatch(fv
), addr
, xlat
,
555 iommu_mr
= memory_region_get_iommu(section
->mr
);
556 if (unlikely(iommu_mr
)) {
557 return address_space_translate_iommu(iommu_mr
, xlat
,
558 plen_out
, page_mask_out
,
563 /* Not behind an IOMMU, use default page size. */
564 *page_mask_out
= ~TARGET_PAGE_MASK
;
570 /* Called from RCU critical section */
571 IOMMUTLBEntry
address_space_get_iotlb_entry(AddressSpace
*as
, hwaddr addr
,
572 bool is_write
, MemTxAttrs attrs
)
574 MemoryRegionSection section
;
575 hwaddr xlat
, page_mask
;
578 * This can never be MMIO, and we don't really care about plen,
581 section
= flatview_do_translate(address_space_to_flatview(as
), addr
, &xlat
,
582 NULL
, &page_mask
, is_write
, false, &as
,
585 /* Illegal translation */
586 if (section
.mr
== &io_mem_unassigned
) {
590 /* Convert memory region offset into address space offset */
591 xlat
+= section
.offset_within_address_space
-
592 section
.offset_within_region
;
594 return (IOMMUTLBEntry
) {
596 .iova
= addr
& ~page_mask
,
597 .translated_addr
= xlat
& ~page_mask
,
598 .addr_mask
= page_mask
,
599 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
604 return (IOMMUTLBEntry
) {0};
607 /* Called from RCU critical section */
608 MemoryRegion
*flatview_translate(FlatView
*fv
, hwaddr addr
, hwaddr
*xlat
,
609 hwaddr
*plen
, bool is_write
,
613 MemoryRegionSection section
;
614 AddressSpace
*as
= NULL
;
616 /* This can be MMIO, so setup MMIO bit. */
617 section
= flatview_do_translate(fv
, addr
, xlat
, plen
, NULL
,
618 is_write
, true, &as
, attrs
);
621 if (xen_enabled() && memory_access_is_direct(mr
, is_write
)) {
622 hwaddr page
= ((addr
& TARGET_PAGE_MASK
) + TARGET_PAGE_SIZE
) - addr
;
623 *plen
= MIN(page
, *plen
);
629 typedef struct TCGIOMMUNotifier
{
637 static void tcg_iommu_unmap_notify(IOMMUNotifier
*n
, IOMMUTLBEntry
*iotlb
)
639 TCGIOMMUNotifier
*notifier
= container_of(n
, TCGIOMMUNotifier
, n
);
641 if (!notifier
->active
) {
644 tlb_flush(notifier
->cpu
);
645 notifier
->active
= false;
646 /* We leave the notifier struct on the list to avoid reallocating it later.
647 * Generally the number of IOMMUs a CPU deals with will be small.
648 * In any case we can't unregister the iommu notifier from a notify
653 static void tcg_register_iommu_notifier(CPUState
*cpu
,
654 IOMMUMemoryRegion
*iommu_mr
,
657 /* Make sure this CPU has an IOMMU notifier registered for this
658 * IOMMU/IOMMU index combination, so that we can flush its TLB
659 * when the IOMMU tells us the mappings we've cached have changed.
661 MemoryRegion
*mr
= MEMORY_REGION(iommu_mr
);
662 TCGIOMMUNotifier
*notifier
;
666 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
667 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
668 if (notifier
->mr
== mr
&& notifier
->iommu_idx
== iommu_idx
) {
672 if (i
== cpu
->iommu_notifiers
->len
) {
673 /* Not found, add a new entry at the end of the array */
674 cpu
->iommu_notifiers
= g_array_set_size(cpu
->iommu_notifiers
, i
+ 1);
675 notifier
= g_new0(TCGIOMMUNotifier
, 1);
676 g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
) = notifier
;
679 notifier
->iommu_idx
= iommu_idx
;
681 /* Rather than trying to register interest in the specific part
682 * of the iommu's address space that we've accessed and then
683 * expand it later as subsequent accesses touch more of it, we
684 * just register interest in the whole thing, on the assumption
685 * that iommu reconfiguration will be rare.
687 iommu_notifier_init(¬ifier
->n
,
688 tcg_iommu_unmap_notify
,
689 IOMMU_NOTIFIER_UNMAP
,
693 ret
= memory_region_register_iommu_notifier(notifier
->mr
, ¬ifier
->n
,
696 error_report_err(err
);
701 if (!notifier
->active
) {
702 notifier
->active
= true;
706 static void tcg_iommu_free_notifier_list(CPUState
*cpu
)
708 /* Destroy the CPU's notifier list */
710 TCGIOMMUNotifier
*notifier
;
712 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
713 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
714 memory_region_unregister_iommu_notifier(notifier
->mr
, ¬ifier
->n
);
717 g_array_free(cpu
->iommu_notifiers
, true);
720 /* Called from RCU critical section */
721 MemoryRegionSection
*
722 address_space_translate_for_iotlb(CPUState
*cpu
, int asidx
, hwaddr addr
,
723 hwaddr
*xlat
, hwaddr
*plen
,
724 MemTxAttrs attrs
, int *prot
)
726 MemoryRegionSection
*section
;
727 IOMMUMemoryRegion
*iommu_mr
;
728 IOMMUMemoryRegionClass
*imrc
;
731 AddressSpaceDispatch
*d
= atomic_rcu_read(&cpu
->cpu_ases
[asidx
].memory_dispatch
);
734 section
= address_space_translate_internal(d
, addr
, &addr
, plen
, false);
736 iommu_mr
= memory_region_get_iommu(section
->mr
);
741 imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
743 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
744 tcg_register_iommu_notifier(cpu
, iommu_mr
, iommu_idx
);
745 /* We need all the permissions, so pass IOMMU_NONE so the IOMMU
746 * doesn't short-cut its translation table walk.
748 iotlb
= imrc
->translate(iommu_mr
, addr
, IOMMU_NONE
, iommu_idx
);
749 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
750 | (addr
& iotlb
.addr_mask
));
751 /* Update the caller's prot bits to remove permissions the IOMMU
752 * is giving us a failure response for. If we get down to no
753 * permissions left at all we can give up now.
755 if (!(iotlb
.perm
& IOMMU_RO
)) {
756 *prot
&= ~(PAGE_READ
| PAGE_EXEC
);
758 if (!(iotlb
.perm
& IOMMU_WO
)) {
759 *prot
&= ~PAGE_WRITE
;
766 d
= flatview_to_dispatch(address_space_to_flatview(iotlb
.target_as
));
769 assert(!memory_region_is_iommu(section
->mr
));
774 return &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
];
778 #if !defined(CONFIG_USER_ONLY)
780 static int cpu_common_post_load(void *opaque
, int version_id
)
782 CPUState
*cpu
= opaque
;
784 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
785 version_id is increased. */
786 cpu
->interrupt_request
&= ~0x01;
789 /* loadvm has just updated the content of RAM, bypassing the
790 * usual mechanisms that ensure we flush TBs for writes to
791 * memory we've translated code from. So we must flush all TBs,
792 * which will now be stale.
799 static int cpu_common_pre_load(void *opaque
)
801 CPUState
*cpu
= opaque
;
803 cpu
->exception_index
= -1;
808 static bool cpu_common_exception_index_needed(void *opaque
)
810 CPUState
*cpu
= opaque
;
812 return tcg_enabled() && cpu
->exception_index
!= -1;
815 static const VMStateDescription vmstate_cpu_common_exception_index
= {
816 .name
= "cpu_common/exception_index",
818 .minimum_version_id
= 1,
819 .needed
= cpu_common_exception_index_needed
,
820 .fields
= (VMStateField
[]) {
821 VMSTATE_INT32(exception_index
, CPUState
),
822 VMSTATE_END_OF_LIST()
826 static bool cpu_common_crash_occurred_needed(void *opaque
)
828 CPUState
*cpu
= opaque
;
830 return cpu
->crash_occurred
;
833 static const VMStateDescription vmstate_cpu_common_crash_occurred
= {
834 .name
= "cpu_common/crash_occurred",
836 .minimum_version_id
= 1,
837 .needed
= cpu_common_crash_occurred_needed
,
838 .fields
= (VMStateField
[]) {
839 VMSTATE_BOOL(crash_occurred
, CPUState
),
840 VMSTATE_END_OF_LIST()
844 const VMStateDescription vmstate_cpu_common
= {
845 .name
= "cpu_common",
847 .minimum_version_id
= 1,
848 .pre_load
= cpu_common_pre_load
,
849 .post_load
= cpu_common_post_load
,
850 .fields
= (VMStateField
[]) {
851 VMSTATE_UINT32(halted
, CPUState
),
852 VMSTATE_UINT32(interrupt_request
, CPUState
),
853 VMSTATE_END_OF_LIST()
855 .subsections
= (const VMStateDescription
*[]) {
856 &vmstate_cpu_common_exception_index
,
857 &vmstate_cpu_common_crash_occurred
,
864 CPUState
*qemu_get_cpu(int index
)
869 if (cpu
->cpu_index
== index
) {
877 #if !defined(CONFIG_USER_ONLY)
878 void cpu_address_space_init(CPUState
*cpu
, int asidx
,
879 const char *prefix
, MemoryRegion
*mr
)
881 CPUAddressSpace
*newas
;
882 AddressSpace
*as
= g_new0(AddressSpace
, 1);
886 as_name
= g_strdup_printf("%s-%d", prefix
, cpu
->cpu_index
);
887 address_space_init(as
, mr
, as_name
);
890 /* Target code should have set num_ases before calling us */
891 assert(asidx
< cpu
->num_ases
);
894 /* address space 0 gets the convenience alias */
898 /* KVM cannot currently support multiple address spaces. */
899 assert(asidx
== 0 || !kvm_enabled());
901 if (!cpu
->cpu_ases
) {
902 cpu
->cpu_ases
= g_new0(CPUAddressSpace
, cpu
->num_ases
);
905 newas
= &cpu
->cpu_ases
[asidx
];
909 newas
->tcg_as_listener
.log_global_after_sync
= tcg_log_global_after_sync
;
910 newas
->tcg_as_listener
.commit
= tcg_commit
;
911 memory_listener_register(&newas
->tcg_as_listener
, as
);
915 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
)
917 /* Return the AddressSpace corresponding to the specified index */
918 return cpu
->cpu_ases
[asidx
].as
;
922 void cpu_exec_unrealizefn(CPUState
*cpu
)
924 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
926 cpu_list_remove(cpu
);
928 if (cc
->vmsd
!= NULL
) {
929 vmstate_unregister(NULL
, cc
->vmsd
, cpu
);
931 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
932 vmstate_unregister(NULL
, &vmstate_cpu_common
, cpu
);
934 #ifndef CONFIG_USER_ONLY
935 tcg_iommu_free_notifier_list(cpu
);
939 Property cpu_common_props
[] = {
940 #ifndef CONFIG_USER_ONLY
941 /* Create a memory property for softmmu CPU object,
942 * so users can wire up its memory. (This can't go in hw/core/cpu.c
943 * because that file is compiled only once for both user-mode
944 * and system builds.) The default if no link is set up is to use
945 * the system address space.
947 DEFINE_PROP_LINK("memory", CPUState
, memory
, TYPE_MEMORY_REGION
,
950 DEFINE_PROP_END_OF_LIST(),
953 void cpu_exec_initfn(CPUState
*cpu
)
958 #ifndef CONFIG_USER_ONLY
959 cpu
->thread_id
= qemu_get_thread_id();
960 cpu
->memory
= system_memory
;
961 object_ref(OBJECT(cpu
->memory
));
965 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
)
967 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
968 static bool tcg_target_initialized
;
972 if (tcg_enabled() && !tcg_target_initialized
) {
973 tcg_target_initialized
= true;
974 cc
->tcg_initialize();
978 qemu_plugin_vcpu_init_hook(cpu
);
980 #ifndef CONFIG_USER_ONLY
981 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
982 vmstate_register(NULL
, cpu
->cpu_index
, &vmstate_cpu_common
, cpu
);
984 if (cc
->vmsd
!= NULL
) {
985 vmstate_register(NULL
, cpu
->cpu_index
, cc
->vmsd
, cpu
);
988 cpu
->iommu_notifiers
= g_array_new(false, true, sizeof(TCGIOMMUNotifier
*));
992 const char *parse_cpu_option(const char *cpu_option
)
996 gchar
**model_pieces
;
997 const char *cpu_type
;
999 model_pieces
= g_strsplit(cpu_option
, ",", 2);
1000 if (!model_pieces
[0]) {
1001 error_report("-cpu option cannot be empty");
1005 oc
= cpu_class_by_name(CPU_RESOLVING_TYPE
, model_pieces
[0]);
1007 error_report("unable to find CPU model '%s'", model_pieces
[0]);
1008 g_strfreev(model_pieces
);
1012 cpu_type
= object_class_get_name(oc
);
1014 cc
->parse_features(cpu_type
, model_pieces
[1], &error_fatal
);
1015 g_strfreev(model_pieces
);
1019 #if defined(CONFIG_USER_ONLY)
1020 void tb_invalidate_phys_addr(target_ulong addr
)
1023 tb_invalidate_phys_page_range(addr
, addr
+ 1);
1027 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
1029 tb_invalidate_phys_addr(pc
);
1032 void tb_invalidate_phys_addr(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
)
1034 ram_addr_t ram_addr
;
1038 if (!tcg_enabled()) {
1042 RCU_READ_LOCK_GUARD();
1043 mr
= address_space_translate(as
, addr
, &addr
, &l
, false, attrs
);
1044 if (!(memory_region_is_ram(mr
)
1045 || memory_region_is_romd(mr
))) {
1048 ram_addr
= memory_region_get_ram_addr(mr
) + addr
;
1049 tb_invalidate_phys_page_range(ram_addr
, ram_addr
+ 1);
1052 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
1055 hwaddr phys
= cpu_get_phys_page_attrs_debug(cpu
, pc
, &attrs
);
1056 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
1058 /* Locks grabbed by tb_invalidate_phys_addr */
1059 tb_invalidate_phys_addr(cpu
->cpu_ases
[asidx
].as
,
1060 phys
| (pc
& ~TARGET_PAGE_MASK
), attrs
);
1065 #ifndef CONFIG_USER_ONLY
1066 /* Add a watchpoint. */
1067 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
1068 int flags
, CPUWatchpoint
**watchpoint
)
1072 /* forbid ranges which are empty or run off the end of the address space */
1073 if (len
== 0 || (addr
+ len
- 1) < addr
) {
1074 error_report("tried to set invalid watchpoint at %"
1075 VADDR_PRIx
", len=%" VADDR_PRIu
, addr
, len
);
1078 wp
= g_malloc(sizeof(*wp
));
1084 /* keep all GDB-injected watchpoints in front */
1085 if (flags
& BP_GDB
) {
1086 QTAILQ_INSERT_HEAD(&cpu
->watchpoints
, wp
, entry
);
1088 QTAILQ_INSERT_TAIL(&cpu
->watchpoints
, wp
, entry
);
1091 tlb_flush_page(cpu
, addr
);
1098 /* Remove a specific watchpoint. */
1099 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
, vaddr len
,
1104 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
1105 if (addr
== wp
->vaddr
&& len
== wp
->len
1106 && flags
== (wp
->flags
& ~BP_WATCHPOINT_HIT
)) {
1107 cpu_watchpoint_remove_by_ref(cpu
, wp
);
1114 /* Remove a specific watchpoint by reference. */
1115 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
)
1117 QTAILQ_REMOVE(&cpu
->watchpoints
, watchpoint
, entry
);
1119 tlb_flush_page(cpu
, watchpoint
->vaddr
);
1124 /* Remove all matching watchpoints. */
1125 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
1127 CPUWatchpoint
*wp
, *next
;
1129 QTAILQ_FOREACH_SAFE(wp
, &cpu
->watchpoints
, entry
, next
) {
1130 if (wp
->flags
& mask
) {
1131 cpu_watchpoint_remove_by_ref(cpu
, wp
);
1136 /* Return true if this watchpoint address matches the specified
1137 * access (ie the address range covered by the watchpoint overlaps
1138 * partially or completely with the address range covered by the
1141 static inline bool watchpoint_address_matches(CPUWatchpoint
*wp
,
1142 vaddr addr
, vaddr len
)
1144 /* We know the lengths are non-zero, but a little caution is
1145 * required to avoid errors in the case where the range ends
1146 * exactly at the top of the address space and so addr + len
1147 * wraps round to zero.
1149 vaddr wpend
= wp
->vaddr
+ wp
->len
- 1;
1150 vaddr addrend
= addr
+ len
- 1;
1152 return !(addr
> wpend
|| wp
->vaddr
> addrend
);
1155 /* Return flags for watchpoints that match addr + prot. */
1156 int cpu_watchpoint_address_matches(CPUState
*cpu
, vaddr addr
, vaddr len
)
1161 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
1162 if (watchpoint_address_matches(wp
, addr
, TARGET_PAGE_SIZE
)) {
1168 #endif /* !CONFIG_USER_ONLY */
1170 /* Add a breakpoint. */
1171 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
1172 CPUBreakpoint
**breakpoint
)
1176 bp
= g_malloc(sizeof(*bp
));
1181 /* keep all GDB-injected breakpoints in front */
1182 if (flags
& BP_GDB
) {
1183 QTAILQ_INSERT_HEAD(&cpu
->breakpoints
, bp
, entry
);
1185 QTAILQ_INSERT_TAIL(&cpu
->breakpoints
, bp
, entry
);
1188 breakpoint_invalidate(cpu
, pc
);
1196 /* Remove a specific breakpoint. */
1197 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
)
1201 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
1202 if (bp
->pc
== pc
&& bp
->flags
== flags
) {
1203 cpu_breakpoint_remove_by_ref(cpu
, bp
);
1210 /* Remove a specific breakpoint by reference. */
1211 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
)
1213 QTAILQ_REMOVE(&cpu
->breakpoints
, breakpoint
, entry
);
1215 breakpoint_invalidate(cpu
, breakpoint
->pc
);
1220 /* Remove all matching breakpoints. */
1221 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
)
1223 CPUBreakpoint
*bp
, *next
;
1225 QTAILQ_FOREACH_SAFE(bp
, &cpu
->breakpoints
, entry
, next
) {
1226 if (bp
->flags
& mask
) {
1227 cpu_breakpoint_remove_by_ref(cpu
, bp
);
1232 /* enable or disable single step mode. EXCP_DEBUG is returned by the
1233 CPU loop after each instruction */
1234 void cpu_single_step(CPUState
*cpu
, int enabled
)
1236 if (cpu
->singlestep_enabled
!= enabled
) {
1237 cpu
->singlestep_enabled
= enabled
;
1238 if (kvm_enabled()) {
1239 kvm_update_guest_debug(cpu
, 0);
1241 /* must flush all the translated code to avoid inconsistencies */
1242 /* XXX: only flush what is necessary */
1248 void cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
1255 fprintf(stderr
, "qemu: fatal: ");
1256 vfprintf(stderr
, fmt
, ap
);
1257 fprintf(stderr
, "\n");
1258 cpu_dump_state(cpu
, stderr
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
1259 if (qemu_log_separate()) {
1261 qemu_log("qemu: fatal: ");
1262 qemu_log_vprintf(fmt
, ap2
);
1264 log_cpu_state(cpu
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
1272 #if defined(CONFIG_USER_ONLY)
1274 struct sigaction act
;
1275 sigfillset(&act
.sa_mask
);
1276 act
.sa_handler
= SIG_DFL
;
1278 sigaction(SIGABRT
, &act
, NULL
);
1284 #if !defined(CONFIG_USER_ONLY)
1285 /* Called from RCU critical section */
1286 static RAMBlock
*qemu_get_ram_block(ram_addr_t addr
)
1290 block
= atomic_rcu_read(&ram_list
.mru_block
);
1291 if (block
&& addr
- block
->offset
< block
->max_length
) {
1294 RAMBLOCK_FOREACH(block
) {
1295 if (addr
- block
->offset
< block
->max_length
) {
1300 fprintf(stderr
, "Bad ram offset %" PRIx64
"\n", (uint64_t)addr
);
1304 /* It is safe to write mru_block outside the iothread lock. This
1309 * xxx removed from list
1313 * call_rcu(reclaim_ramblock, xxx);
1316 * atomic_rcu_set is not needed here. The block was already published
1317 * when it was placed into the list. Here we're just making an extra
1318 * copy of the pointer.
1320 ram_list
.mru_block
= block
;
1324 static void tlb_reset_dirty_range_all(ram_addr_t start
, ram_addr_t length
)
1331 assert(tcg_enabled());
1332 end
= TARGET_PAGE_ALIGN(start
+ length
);
1333 start
&= TARGET_PAGE_MASK
;
1335 RCU_READ_LOCK_GUARD();
1336 block
= qemu_get_ram_block(start
);
1337 assert(block
== qemu_get_ram_block(end
- 1));
1338 start1
= (uintptr_t)ramblock_ptr(block
, start
- block
->offset
);
1340 tlb_reset_dirty(cpu
, start1
, length
);
1344 /* Note: start and end must be within the same ram block. */
1345 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start
,
1349 DirtyMemoryBlocks
*blocks
;
1350 unsigned long end
, page
;
1353 uint64_t mr_offset
, mr_size
;
1359 end
= TARGET_PAGE_ALIGN(start
+ length
) >> TARGET_PAGE_BITS
;
1360 page
= start
>> TARGET_PAGE_BITS
;
1362 WITH_RCU_READ_LOCK_GUARD() {
1363 blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1364 ramblock
= qemu_get_ram_block(start
);
1365 /* Range sanity check on the ramblock */
1366 assert(start
>= ramblock
->offset
&&
1367 start
+ length
<= ramblock
->offset
+ ramblock
->used_length
);
1369 while (page
< end
) {
1370 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1371 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1372 unsigned long num
= MIN(end
- page
,
1373 DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1375 dirty
|= bitmap_test_and_clear_atomic(blocks
->blocks
[idx
],
1380 mr_offset
= (ram_addr_t
)(page
<< TARGET_PAGE_BITS
) - ramblock
->offset
;
1381 mr_size
= (end
- page
) << TARGET_PAGE_BITS
;
1382 memory_region_clear_dirty_bitmap(ramblock
->mr
, mr_offset
, mr_size
);
1385 if (dirty
&& tcg_enabled()) {
1386 tlb_reset_dirty_range_all(start
, length
);
1392 DirtyBitmapSnapshot
*cpu_physical_memory_snapshot_and_clear_dirty
1393 (MemoryRegion
*mr
, hwaddr offset
, hwaddr length
, unsigned client
)
1395 DirtyMemoryBlocks
*blocks
;
1396 ram_addr_t start
= memory_region_get_ram_addr(mr
) + offset
;
1397 unsigned long align
= 1UL << (TARGET_PAGE_BITS
+ BITS_PER_LEVEL
);
1398 ram_addr_t first
= QEMU_ALIGN_DOWN(start
, align
);
1399 ram_addr_t last
= QEMU_ALIGN_UP(start
+ length
, align
);
1400 DirtyBitmapSnapshot
*snap
;
1401 unsigned long page
, end
, dest
;
1403 snap
= g_malloc0(sizeof(*snap
) +
1404 ((last
- first
) >> (TARGET_PAGE_BITS
+ 3)));
1405 snap
->start
= first
;
1408 page
= first
>> TARGET_PAGE_BITS
;
1409 end
= last
>> TARGET_PAGE_BITS
;
1412 WITH_RCU_READ_LOCK_GUARD() {
1413 blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1415 while (page
< end
) {
1416 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1417 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1418 unsigned long num
= MIN(end
- page
,
1419 DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1421 assert(QEMU_IS_ALIGNED(offset
, (1 << BITS_PER_LEVEL
)));
1422 assert(QEMU_IS_ALIGNED(num
, (1 << BITS_PER_LEVEL
)));
1423 offset
>>= BITS_PER_LEVEL
;
1425 bitmap_copy_and_clear_atomic(snap
->dirty
+ dest
,
1426 blocks
->blocks
[idx
] + offset
,
1429 dest
+= num
>> BITS_PER_LEVEL
;
1433 if (tcg_enabled()) {
1434 tlb_reset_dirty_range_all(start
, length
);
1437 memory_region_clear_dirty_bitmap(mr
, offset
, length
);
1442 bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot
*snap
,
1446 unsigned long page
, end
;
1448 assert(start
>= snap
->start
);
1449 assert(start
+ length
<= snap
->end
);
1451 end
= TARGET_PAGE_ALIGN(start
+ length
- snap
->start
) >> TARGET_PAGE_BITS
;
1452 page
= (start
- snap
->start
) >> TARGET_PAGE_BITS
;
1454 while (page
< end
) {
1455 if (test_bit(page
, snap
->dirty
)) {
1463 /* Called from RCU critical section */
1464 hwaddr
memory_region_section_get_iotlb(CPUState
*cpu
,
1465 MemoryRegionSection
*section
)
1467 AddressSpaceDispatch
*d
= flatview_to_dispatch(section
->fv
);
1468 return section
- d
->map
.sections
;
1470 #endif /* defined(CONFIG_USER_ONLY) */
1472 #if !defined(CONFIG_USER_ONLY)
1474 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
1476 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
);
1478 static void *(*phys_mem_alloc
)(size_t size
, uint64_t *align
, bool shared
) =
1479 qemu_anon_ram_alloc
;
1482 * Set a custom physical guest memory alloator.
1483 * Accelerators with unusual needs may need this. Hopefully, we can
1484 * get rid of it eventually.
1486 void phys_mem_set_alloc(void *(*alloc
)(size_t, uint64_t *align
, bool shared
))
1488 phys_mem_alloc
= alloc
;
1491 static uint16_t phys_section_add(PhysPageMap
*map
,
1492 MemoryRegionSection
*section
)
1494 /* The physical section number is ORed with a page-aligned
1495 * pointer to produce the iotlb entries. Thus it should
1496 * never overflow into the page-aligned value.
1498 assert(map
->sections_nb
< TARGET_PAGE_SIZE
);
1500 if (map
->sections_nb
== map
->sections_nb_alloc
) {
1501 map
->sections_nb_alloc
= MAX(map
->sections_nb_alloc
* 2, 16);
1502 map
->sections
= g_renew(MemoryRegionSection
, map
->sections
,
1503 map
->sections_nb_alloc
);
1505 map
->sections
[map
->sections_nb
] = *section
;
1506 memory_region_ref(section
->mr
);
1507 return map
->sections_nb
++;
1510 static void phys_section_destroy(MemoryRegion
*mr
)
1512 bool have_sub_page
= mr
->subpage
;
1514 memory_region_unref(mr
);
1516 if (have_sub_page
) {
1517 subpage_t
*subpage
= container_of(mr
, subpage_t
, iomem
);
1518 object_unref(OBJECT(&subpage
->iomem
));
1523 static void phys_sections_free(PhysPageMap
*map
)
1525 while (map
->sections_nb
> 0) {
1526 MemoryRegionSection
*section
= &map
->sections
[--map
->sections_nb
];
1527 phys_section_destroy(section
->mr
);
1529 g_free(map
->sections
);
1533 static void register_subpage(FlatView
*fv
, MemoryRegionSection
*section
)
1535 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1537 hwaddr base
= section
->offset_within_address_space
1539 MemoryRegionSection
*existing
= phys_page_find(d
, base
);
1540 MemoryRegionSection subsection
= {
1541 .offset_within_address_space
= base
,
1542 .size
= int128_make64(TARGET_PAGE_SIZE
),
1546 assert(existing
->mr
->subpage
|| existing
->mr
== &io_mem_unassigned
);
1548 if (!(existing
->mr
->subpage
)) {
1549 subpage
= subpage_init(fv
, base
);
1551 subsection
.mr
= &subpage
->iomem
;
1552 phys_page_set(d
, base
>> TARGET_PAGE_BITS
, 1,
1553 phys_section_add(&d
->map
, &subsection
));
1555 subpage
= container_of(existing
->mr
, subpage_t
, iomem
);
1557 start
= section
->offset_within_address_space
& ~TARGET_PAGE_MASK
;
1558 end
= start
+ int128_get64(section
->size
) - 1;
1559 subpage_register(subpage
, start
, end
,
1560 phys_section_add(&d
->map
, section
));
1564 static void register_multipage(FlatView
*fv
,
1565 MemoryRegionSection
*section
)
1567 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1568 hwaddr start_addr
= section
->offset_within_address_space
;
1569 uint16_t section_index
= phys_section_add(&d
->map
, section
);
1570 uint64_t num_pages
= int128_get64(int128_rshift(section
->size
,
1574 phys_page_set(d
, start_addr
>> TARGET_PAGE_BITS
, num_pages
, section_index
);
1578 * The range in *section* may look like this:
1582 * where s stands for subpage and P for page.
1584 void flatview_add_to_dispatch(FlatView
*fv
, MemoryRegionSection
*section
)
1586 MemoryRegionSection remain
= *section
;
1587 Int128 page_size
= int128_make64(TARGET_PAGE_SIZE
);
1589 /* register first subpage */
1590 if (remain
.offset_within_address_space
& ~TARGET_PAGE_MASK
) {
1591 uint64_t left
= TARGET_PAGE_ALIGN(remain
.offset_within_address_space
)
1592 - remain
.offset_within_address_space
;
1594 MemoryRegionSection now
= remain
;
1595 now
.size
= int128_min(int128_make64(left
), now
.size
);
1596 register_subpage(fv
, &now
);
1597 if (int128_eq(remain
.size
, now
.size
)) {
1600 remain
.size
= int128_sub(remain
.size
, now
.size
);
1601 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1602 remain
.offset_within_region
+= int128_get64(now
.size
);
1605 /* register whole pages */
1606 if (int128_ge(remain
.size
, page_size
)) {
1607 MemoryRegionSection now
= remain
;
1608 now
.size
= int128_and(now
.size
, int128_neg(page_size
));
1609 register_multipage(fv
, &now
);
1610 if (int128_eq(remain
.size
, now
.size
)) {
1613 remain
.size
= int128_sub(remain
.size
, now
.size
);
1614 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1615 remain
.offset_within_region
+= int128_get64(now
.size
);
1618 /* register last subpage */
1619 register_subpage(fv
, &remain
);
1622 void qemu_flush_coalesced_mmio_buffer(void)
1625 kvm_flush_coalesced_mmio_buffer();
1628 void qemu_mutex_lock_ramlist(void)
1630 qemu_mutex_lock(&ram_list
.mutex
);
1633 void qemu_mutex_unlock_ramlist(void)
1635 qemu_mutex_unlock(&ram_list
.mutex
);
1638 void ram_block_dump(Monitor
*mon
)
1643 RCU_READ_LOCK_GUARD();
1644 monitor_printf(mon
, "%24s %8s %18s %18s %18s\n",
1645 "Block Name", "PSize", "Offset", "Used", "Total");
1646 RAMBLOCK_FOREACH(block
) {
1647 psize
= size_to_str(block
->page_size
);
1648 monitor_printf(mon
, "%24s %8s 0x%016" PRIx64
" 0x%016" PRIx64
1649 " 0x%016" PRIx64
"\n", block
->idstr
, psize
,
1650 (uint64_t)block
->offset
,
1651 (uint64_t)block
->used_length
,
1652 (uint64_t)block
->max_length
);
1659 * FIXME TOCTTOU: this iterates over memory backends' mem-path, which
1660 * may or may not name the same files / on the same filesystem now as
1661 * when we actually open and map them. Iterate over the file
1662 * descriptors instead, and use qemu_fd_getpagesize().
1664 static int find_min_backend_pagesize(Object
*obj
, void *opaque
)
1666 long *hpsize_min
= opaque
;
1668 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1669 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1670 long hpsize
= host_memory_backend_pagesize(backend
);
1672 if (host_memory_backend_is_mapped(backend
) && (hpsize
< *hpsize_min
)) {
1673 *hpsize_min
= hpsize
;
1680 static int find_max_backend_pagesize(Object
*obj
, void *opaque
)
1682 long *hpsize_max
= opaque
;
1684 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1685 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1686 long hpsize
= host_memory_backend_pagesize(backend
);
1688 if (host_memory_backend_is_mapped(backend
) && (hpsize
> *hpsize_max
)) {
1689 *hpsize_max
= hpsize
;
1697 * TODO: We assume right now that all mapped host memory backends are
1698 * used as RAM, however some might be used for different purposes.
1700 long qemu_minrampagesize(void)
1702 long hpsize
= LONG_MAX
;
1703 long mainrampagesize
;
1704 Object
*memdev_root
;
1705 MachineState
*ms
= MACHINE(qdev_get_machine());
1707 mainrampagesize
= qemu_mempath_getpagesize(mem_path
);
1709 /* it's possible we have memory-backend objects with
1710 * hugepage-backed RAM. these may get mapped into system
1711 * address space via -numa parameters or memory hotplug
1712 * hooks. we want to take these into account, but we
1713 * also want to make sure these supported hugepage
1714 * sizes are applicable across the entire range of memory
1715 * we may boot from, so we take the min across all
1716 * backends, and assume normal pages in cases where a
1717 * backend isn't backed by hugepages.
1719 memdev_root
= object_resolve_path("/objects", NULL
);
1721 object_child_foreach(memdev_root
, find_min_backend_pagesize
, &hpsize
);
1723 if (hpsize
== LONG_MAX
) {
1724 /* No additional memory regions found ==> Report main RAM page size */
1725 return mainrampagesize
;
1728 /* If NUMA is disabled or the NUMA nodes are not backed with a
1729 * memory-backend, then there is at least one node using "normal" RAM,
1730 * so if its page size is smaller we have got to report that size instead.
1732 if (hpsize
> mainrampagesize
&&
1733 (ms
->numa_state
== NULL
||
1734 ms
->numa_state
->num_nodes
== 0 ||
1735 ms
->numa_state
->nodes
[0].node_memdev
== NULL
)) {
1738 error_report("Huge page support disabled (n/a for main memory).");
1741 return mainrampagesize
;
1747 long qemu_maxrampagesize(void)
1749 long pagesize
= qemu_mempath_getpagesize(mem_path
);
1750 Object
*memdev_root
= object_resolve_path("/objects", NULL
);
1753 object_child_foreach(memdev_root
, find_max_backend_pagesize
,
1759 long qemu_minrampagesize(void)
1761 return qemu_real_host_page_size
;
1763 long qemu_maxrampagesize(void)
1765 return qemu_real_host_page_size
;
1770 static int64_t get_file_size(int fd
)
1773 #if defined(__linux__)
1776 if (fstat(fd
, &st
) < 0) {
1780 /* Special handling for devdax character devices */
1781 if (S_ISCHR(st
.st_mode
)) {
1782 g_autofree
char *subsystem_path
= NULL
;
1783 g_autofree
char *subsystem
= NULL
;
1785 subsystem_path
= g_strdup_printf("/sys/dev/char/%d:%d/subsystem",
1786 major(st
.st_rdev
), minor(st
.st_rdev
));
1787 subsystem
= g_file_read_link(subsystem_path
, NULL
);
1789 if (subsystem
&& g_str_has_suffix(subsystem
, "/dax")) {
1790 g_autofree
char *size_path
= NULL
;
1791 g_autofree
char *size_str
= NULL
;
1793 size_path
= g_strdup_printf("/sys/dev/char/%d:%d/size",
1794 major(st
.st_rdev
), minor(st
.st_rdev
));
1796 if (g_file_get_contents(size_path
, &size_str
, NULL
, NULL
)) {
1797 return g_ascii_strtoll(size_str
, NULL
, 0);
1801 #endif /* defined(__linux__) */
1803 /* st.st_size may be zero for special files yet lseek(2) works */
1804 size
= lseek(fd
, 0, SEEK_END
);
1811 static int file_ram_open(const char *path
,
1812 const char *region_name
,
1817 char *sanitized_name
;
1823 fd
= open(path
, O_RDWR
);
1825 /* @path names an existing file, use it */
1828 if (errno
== ENOENT
) {
1829 /* @path names a file that doesn't exist, create it */
1830 fd
= open(path
, O_RDWR
| O_CREAT
| O_EXCL
, 0644);
1835 } else if (errno
== EISDIR
) {
1836 /* @path names a directory, create a file there */
1837 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1838 sanitized_name
= g_strdup(region_name
);
1839 for (c
= sanitized_name
; *c
!= '\0'; c
++) {
1845 filename
= g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path
,
1847 g_free(sanitized_name
);
1849 fd
= mkstemp(filename
);
1857 if (errno
!= EEXIST
&& errno
!= EINTR
) {
1858 error_setg_errno(errp
, errno
,
1859 "can't open backing store %s for guest RAM",
1864 * Try again on EINTR and EEXIST. The latter happens when
1865 * something else creates the file between our two open().
1872 static void *file_ram_alloc(RAMBlock
*block
,
1878 MachineState
*ms
= MACHINE(qdev_get_machine());
1881 block
->page_size
= qemu_fd_getpagesize(fd
);
1882 if (block
->mr
->align
% block
->page_size
) {
1883 error_setg(errp
, "alignment 0x%" PRIx64
1884 " must be multiples of page size 0x%zx",
1885 block
->mr
->align
, block
->page_size
);
1887 } else if (block
->mr
->align
&& !is_power_of_2(block
->mr
->align
)) {
1888 error_setg(errp
, "alignment 0x%" PRIx64
1889 " must be a power of two", block
->mr
->align
);
1892 block
->mr
->align
= MAX(block
->page_size
, block
->mr
->align
);
1893 #if defined(__s390x__)
1894 if (kvm_enabled()) {
1895 block
->mr
->align
= MAX(block
->mr
->align
, QEMU_VMALLOC_ALIGN
);
1899 if (memory
< block
->page_size
) {
1900 error_setg(errp
, "memory size 0x" RAM_ADDR_FMT
" must be equal to "
1901 "or larger than page size 0x%zx",
1902 memory
, block
->page_size
);
1906 memory
= ROUND_UP(memory
, block
->page_size
);
1909 * ftruncate is not supported by hugetlbfs in older
1910 * hosts, so don't bother bailing out on errors.
1911 * If anything goes wrong with it under other filesystems,
1914 * Do not truncate the non-empty backend file to avoid corrupting
1915 * the existing data in the file. Disabling shrinking is not
1916 * enough. For example, the current vNVDIMM implementation stores
1917 * the guest NVDIMM labels at the end of the backend file. If the
1918 * backend file is later extended, QEMU will not be able to find
1919 * those labels. Therefore, extending the non-empty backend file
1920 * is disabled as well.
1922 if (truncate
&& ftruncate(fd
, memory
)) {
1923 perror("ftruncate");
1926 area
= qemu_ram_mmap(fd
, memory
, block
->mr
->align
,
1927 block
->flags
& RAM_SHARED
, block
->flags
& RAM_PMEM
);
1928 if (area
== MAP_FAILED
) {
1929 error_setg_errno(errp
, errno
,
1930 "unable to map backing store for guest RAM");
1935 os_mem_prealloc(fd
, area
, memory
, ms
->smp
.cpus
, errp
);
1936 if (errp
&& *errp
) {
1937 qemu_ram_munmap(fd
, area
, memory
);
1947 /* Allocate space within the ram_addr_t space that governs the
1949 * Called with the ramlist lock held.
1951 static ram_addr_t
find_ram_offset(ram_addr_t size
)
1953 RAMBlock
*block
, *next_block
;
1954 ram_addr_t offset
= RAM_ADDR_MAX
, mingap
= RAM_ADDR_MAX
;
1956 assert(size
!= 0); /* it would hand out same offset multiple times */
1958 if (QLIST_EMPTY_RCU(&ram_list
.blocks
)) {
1962 RAMBLOCK_FOREACH(block
) {
1963 ram_addr_t candidate
, next
= RAM_ADDR_MAX
;
1965 /* Align blocks to start on a 'long' in the bitmap
1966 * which makes the bitmap sync'ing take the fast path.
1968 candidate
= block
->offset
+ block
->max_length
;
1969 candidate
= ROUND_UP(candidate
, BITS_PER_LONG
<< TARGET_PAGE_BITS
);
1971 /* Search for the closest following block
1974 RAMBLOCK_FOREACH(next_block
) {
1975 if (next_block
->offset
>= candidate
) {
1976 next
= MIN(next
, next_block
->offset
);
1980 /* If it fits remember our place and remember the size
1981 * of gap, but keep going so that we might find a smaller
1982 * gap to fill so avoiding fragmentation.
1984 if (next
- candidate
>= size
&& next
- candidate
< mingap
) {
1986 mingap
= next
- candidate
;
1989 trace_find_ram_offset_loop(size
, candidate
, offset
, next
, mingap
);
1992 if (offset
== RAM_ADDR_MAX
) {
1993 fprintf(stderr
, "Failed to find gap of requested size: %" PRIu64
"\n",
1998 trace_find_ram_offset(size
, offset
);
2003 static unsigned long last_ram_page(void)
2006 ram_addr_t last
= 0;
2008 RCU_READ_LOCK_GUARD();
2009 RAMBLOCK_FOREACH(block
) {
2010 last
= MAX(last
, block
->offset
+ block
->max_length
);
2012 return last
>> TARGET_PAGE_BITS
;
2015 static void qemu_ram_setup_dump(void *addr
, ram_addr_t size
)
2019 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
2020 if (!machine_dump_guest_core(current_machine
)) {
2021 ret
= qemu_madvise(addr
, size
, QEMU_MADV_DONTDUMP
);
2023 perror("qemu_madvise");
2024 fprintf(stderr
, "madvise doesn't support MADV_DONTDUMP, "
2025 "but dump_guest_core=off specified\n");
2030 const char *qemu_ram_get_idstr(RAMBlock
*rb
)
2035 void *qemu_ram_get_host_addr(RAMBlock
*rb
)
2040 ram_addr_t
qemu_ram_get_offset(RAMBlock
*rb
)
2045 ram_addr_t
qemu_ram_get_used_length(RAMBlock
*rb
)
2047 return rb
->used_length
;
2050 bool qemu_ram_is_shared(RAMBlock
*rb
)
2052 return rb
->flags
& RAM_SHARED
;
2055 /* Note: Only set at the start of postcopy */
2056 bool qemu_ram_is_uf_zeroable(RAMBlock
*rb
)
2058 return rb
->flags
& RAM_UF_ZEROPAGE
;
2061 void qemu_ram_set_uf_zeroable(RAMBlock
*rb
)
2063 rb
->flags
|= RAM_UF_ZEROPAGE
;
2066 bool qemu_ram_is_migratable(RAMBlock
*rb
)
2068 return rb
->flags
& RAM_MIGRATABLE
;
2071 void qemu_ram_set_migratable(RAMBlock
*rb
)
2073 rb
->flags
|= RAM_MIGRATABLE
;
2076 void qemu_ram_unset_migratable(RAMBlock
*rb
)
2078 rb
->flags
&= ~RAM_MIGRATABLE
;
2081 /* Called with iothread lock held. */
2082 void qemu_ram_set_idstr(RAMBlock
*new_block
, const char *name
, DeviceState
*dev
)
2087 assert(!new_block
->idstr
[0]);
2090 char *id
= qdev_get_dev_path(dev
);
2092 snprintf(new_block
->idstr
, sizeof(new_block
->idstr
), "%s/", id
);
2096 pstrcat(new_block
->idstr
, sizeof(new_block
->idstr
), name
);
2098 RCU_READ_LOCK_GUARD();
2099 RAMBLOCK_FOREACH(block
) {
2100 if (block
!= new_block
&&
2101 !strcmp(block
->idstr
, new_block
->idstr
)) {
2102 fprintf(stderr
, "RAMBlock \"%s\" already registered, abort!\n",
2109 /* Called with iothread lock held. */
2110 void qemu_ram_unset_idstr(RAMBlock
*block
)
2112 /* FIXME: arch_init.c assumes that this is not called throughout
2113 * migration. Ignore the problem since hot-unplug during migration
2114 * does not work anyway.
2117 memset(block
->idstr
, 0, sizeof(block
->idstr
));
2121 size_t qemu_ram_pagesize(RAMBlock
*rb
)
2123 return rb
->page_size
;
2126 /* Returns the largest size of page in use */
2127 size_t qemu_ram_pagesize_largest(void)
2132 RAMBLOCK_FOREACH(block
) {
2133 largest
= MAX(largest
, qemu_ram_pagesize(block
));
2139 static int memory_try_enable_merging(void *addr
, size_t len
)
2141 if (!machine_mem_merge(current_machine
)) {
2142 /* disabled by the user */
2146 return qemu_madvise(addr
, len
, QEMU_MADV_MERGEABLE
);
2149 /* Only legal before guest might have detected the memory size: e.g. on
2150 * incoming migration, or right after reset.
2152 * As memory core doesn't know how is memory accessed, it is up to
2153 * resize callback to update device state and/or add assertions to detect
2154 * misuse, if necessary.
2156 int qemu_ram_resize(RAMBlock
*block
, ram_addr_t newsize
, Error
**errp
)
2160 newsize
= HOST_PAGE_ALIGN(newsize
);
2162 if (block
->used_length
== newsize
) {
2166 if (!(block
->flags
& RAM_RESIZEABLE
)) {
2167 error_setg_errno(errp
, EINVAL
,
2168 "Length mismatch: %s: 0x" RAM_ADDR_FMT
2169 " in != 0x" RAM_ADDR_FMT
, block
->idstr
,
2170 newsize
, block
->used_length
);
2174 if (block
->max_length
< newsize
) {
2175 error_setg_errno(errp
, EINVAL
,
2176 "Length too large: %s: 0x" RAM_ADDR_FMT
2177 " > 0x" RAM_ADDR_FMT
, block
->idstr
,
2178 newsize
, block
->max_length
);
2182 cpu_physical_memory_clear_dirty_range(block
->offset
, block
->used_length
);
2183 block
->used_length
= newsize
;
2184 cpu_physical_memory_set_dirty_range(block
->offset
, block
->used_length
,
2186 memory_region_set_size(block
->mr
, newsize
);
2187 if (block
->resized
) {
2188 block
->resized(block
->idstr
, newsize
, block
->host
);
2193 /* Called with ram_list.mutex held */
2194 static void dirty_memory_extend(ram_addr_t old_ram_size
,
2195 ram_addr_t new_ram_size
)
2197 ram_addr_t old_num_blocks
= DIV_ROUND_UP(old_ram_size
,
2198 DIRTY_MEMORY_BLOCK_SIZE
);
2199 ram_addr_t new_num_blocks
= DIV_ROUND_UP(new_ram_size
,
2200 DIRTY_MEMORY_BLOCK_SIZE
);
2203 /* Only need to extend if block count increased */
2204 if (new_num_blocks
<= old_num_blocks
) {
2208 for (i
= 0; i
< DIRTY_MEMORY_NUM
; i
++) {
2209 DirtyMemoryBlocks
*old_blocks
;
2210 DirtyMemoryBlocks
*new_blocks
;
2213 old_blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[i
]);
2214 new_blocks
= g_malloc(sizeof(*new_blocks
) +
2215 sizeof(new_blocks
->blocks
[0]) * new_num_blocks
);
2217 if (old_num_blocks
) {
2218 memcpy(new_blocks
->blocks
, old_blocks
->blocks
,
2219 old_num_blocks
* sizeof(old_blocks
->blocks
[0]));
2222 for (j
= old_num_blocks
; j
< new_num_blocks
; j
++) {
2223 new_blocks
->blocks
[j
] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE
);
2226 atomic_rcu_set(&ram_list
.dirty_memory
[i
], new_blocks
);
2229 g_free_rcu(old_blocks
, rcu
);
2234 static void ram_block_add(RAMBlock
*new_block
, Error
**errp
, bool shared
)
2237 RAMBlock
*last_block
= NULL
;
2238 ram_addr_t old_ram_size
, new_ram_size
;
2241 old_ram_size
= last_ram_page();
2243 qemu_mutex_lock_ramlist();
2244 new_block
->offset
= find_ram_offset(new_block
->max_length
);
2246 if (!new_block
->host
) {
2247 if (xen_enabled()) {
2248 xen_ram_alloc(new_block
->offset
, new_block
->max_length
,
2249 new_block
->mr
, &err
);
2251 error_propagate(errp
, err
);
2252 qemu_mutex_unlock_ramlist();
2256 new_block
->host
= phys_mem_alloc(new_block
->max_length
,
2257 &new_block
->mr
->align
, shared
);
2258 if (!new_block
->host
) {
2259 error_setg_errno(errp
, errno
,
2260 "cannot set up guest memory '%s'",
2261 memory_region_name(new_block
->mr
));
2262 qemu_mutex_unlock_ramlist();
2265 memory_try_enable_merging(new_block
->host
, new_block
->max_length
);
2269 new_ram_size
= MAX(old_ram_size
,
2270 (new_block
->offset
+ new_block
->max_length
) >> TARGET_PAGE_BITS
);
2271 if (new_ram_size
> old_ram_size
) {
2272 dirty_memory_extend(old_ram_size
, new_ram_size
);
2274 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
2275 * QLIST (which has an RCU-friendly variant) does not have insertion at
2276 * tail, so save the last element in last_block.
2278 RAMBLOCK_FOREACH(block
) {
2280 if (block
->max_length
< new_block
->max_length
) {
2285 QLIST_INSERT_BEFORE_RCU(block
, new_block
, next
);
2286 } else if (last_block
) {
2287 QLIST_INSERT_AFTER_RCU(last_block
, new_block
, next
);
2288 } else { /* list is empty */
2289 QLIST_INSERT_HEAD_RCU(&ram_list
.blocks
, new_block
, next
);
2291 ram_list
.mru_block
= NULL
;
2293 /* Write list before version */
2296 qemu_mutex_unlock_ramlist();
2298 cpu_physical_memory_set_dirty_range(new_block
->offset
,
2299 new_block
->used_length
,
2302 if (new_block
->host
) {
2303 qemu_ram_setup_dump(new_block
->host
, new_block
->max_length
);
2304 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_HUGEPAGE
);
2305 /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */
2306 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_DONTFORK
);
2307 ram_block_notify_add(new_block
->host
, new_block
->max_length
);
2312 RAMBlock
*qemu_ram_alloc_from_fd(ram_addr_t size
, MemoryRegion
*mr
,
2313 uint32_t ram_flags
, int fd
,
2316 RAMBlock
*new_block
;
2317 Error
*local_err
= NULL
;
2320 /* Just support these ram flags by now. */
2321 assert((ram_flags
& ~(RAM_SHARED
| RAM_PMEM
)) == 0);
2323 if (xen_enabled()) {
2324 error_setg(errp
, "-mem-path not supported with Xen");
2328 if (kvm_enabled() && !kvm_has_sync_mmu()) {
2330 "host lacks kvm mmu notifiers, -mem-path unsupported");
2334 if (phys_mem_alloc
!= qemu_anon_ram_alloc
) {
2336 * file_ram_alloc() needs to allocate just like
2337 * phys_mem_alloc, but we haven't bothered to provide
2341 "-mem-path not supported with this accelerator");
2345 size
= HOST_PAGE_ALIGN(size
);
2346 file_size
= get_file_size(fd
);
2347 if (file_size
> 0 && file_size
< size
) {
2348 error_setg(errp
, "backing store %s size 0x%" PRIx64
2349 " does not match 'size' option 0x" RAM_ADDR_FMT
,
2350 mem_path
, file_size
, size
);
2354 new_block
= g_malloc0(sizeof(*new_block
));
2356 new_block
->used_length
= size
;
2357 new_block
->max_length
= size
;
2358 new_block
->flags
= ram_flags
;
2359 new_block
->host
= file_ram_alloc(new_block
, size
, fd
, !file_size
, errp
);
2360 if (!new_block
->host
) {
2365 ram_block_add(new_block
, &local_err
, ram_flags
& RAM_SHARED
);
2368 error_propagate(errp
, local_err
);
2376 RAMBlock
*qemu_ram_alloc_from_file(ram_addr_t size
, MemoryRegion
*mr
,
2377 uint32_t ram_flags
, const char *mem_path
,
2384 fd
= file_ram_open(mem_path
, memory_region_name(mr
), &created
, errp
);
2389 block
= qemu_ram_alloc_from_fd(size
, mr
, ram_flags
, fd
, errp
);
2403 RAMBlock
*qemu_ram_alloc_internal(ram_addr_t size
, ram_addr_t max_size
,
2404 void (*resized
)(const char*,
2407 void *host
, bool resizeable
, bool share
,
2408 MemoryRegion
*mr
, Error
**errp
)
2410 RAMBlock
*new_block
;
2411 Error
*local_err
= NULL
;
2413 size
= HOST_PAGE_ALIGN(size
);
2414 max_size
= HOST_PAGE_ALIGN(max_size
);
2415 new_block
= g_malloc0(sizeof(*new_block
));
2417 new_block
->resized
= resized
;
2418 new_block
->used_length
= size
;
2419 new_block
->max_length
= max_size
;
2420 assert(max_size
>= size
);
2422 new_block
->page_size
= qemu_real_host_page_size
;
2423 new_block
->host
= host
;
2425 new_block
->flags
|= RAM_PREALLOC
;
2428 new_block
->flags
|= RAM_RESIZEABLE
;
2430 ram_block_add(new_block
, &local_err
, share
);
2433 error_propagate(errp
, local_err
);
2439 RAMBlock
*qemu_ram_alloc_from_ptr(ram_addr_t size
, void *host
,
2440 MemoryRegion
*mr
, Error
**errp
)
2442 return qemu_ram_alloc_internal(size
, size
, NULL
, host
, false,
2446 RAMBlock
*qemu_ram_alloc(ram_addr_t size
, bool share
,
2447 MemoryRegion
*mr
, Error
**errp
)
2449 return qemu_ram_alloc_internal(size
, size
, NULL
, NULL
, false,
2453 RAMBlock
*qemu_ram_alloc_resizeable(ram_addr_t size
, ram_addr_t maxsz
,
2454 void (*resized
)(const char*,
2457 MemoryRegion
*mr
, Error
**errp
)
2459 return qemu_ram_alloc_internal(size
, maxsz
, resized
, NULL
, true,
2463 static void reclaim_ramblock(RAMBlock
*block
)
2465 if (block
->flags
& RAM_PREALLOC
) {
2467 } else if (xen_enabled()) {
2468 xen_invalidate_map_cache_entry(block
->host
);
2470 } else if (block
->fd
>= 0) {
2471 qemu_ram_munmap(block
->fd
, block
->host
, block
->max_length
);
2475 qemu_anon_ram_free(block
->host
, block
->max_length
);
2480 void qemu_ram_free(RAMBlock
*block
)
2487 ram_block_notify_remove(block
->host
, block
->max_length
);
2490 qemu_mutex_lock_ramlist();
2491 QLIST_REMOVE_RCU(block
, next
);
2492 ram_list
.mru_block
= NULL
;
2493 /* Write list before version */
2496 call_rcu(block
, reclaim_ramblock
, rcu
);
2497 qemu_mutex_unlock_ramlist();
2501 void qemu_ram_remap(ram_addr_t addr
, ram_addr_t length
)
2508 RAMBLOCK_FOREACH(block
) {
2509 offset
= addr
- block
->offset
;
2510 if (offset
< block
->max_length
) {
2511 vaddr
= ramblock_ptr(block
, offset
);
2512 if (block
->flags
& RAM_PREALLOC
) {
2514 } else if (xen_enabled()) {
2518 if (block
->fd
>= 0) {
2519 flags
|= (block
->flags
& RAM_SHARED
?
2520 MAP_SHARED
: MAP_PRIVATE
);
2521 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2522 flags
, block
->fd
, offset
);
2525 * Remap needs to match alloc. Accelerators that
2526 * set phys_mem_alloc never remap. If they did,
2527 * we'd need a remap hook here.
2529 assert(phys_mem_alloc
== qemu_anon_ram_alloc
);
2531 flags
|= MAP_PRIVATE
| MAP_ANONYMOUS
;
2532 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2535 if (area
!= vaddr
) {
2536 error_report("Could not remap addr: "
2537 RAM_ADDR_FMT
"@" RAM_ADDR_FMT
"",
2541 memory_try_enable_merging(vaddr
, length
);
2542 qemu_ram_setup_dump(vaddr
, length
);
2547 #endif /* !_WIN32 */
2549 /* Return a host pointer to ram allocated with qemu_ram_alloc.
2550 * This should not be used for general purpose DMA. Use address_space_map
2551 * or address_space_rw instead. For local memory (e.g. video ram) that the
2552 * device owns, use memory_region_get_ram_ptr.
2554 * Called within RCU critical section.
2556 void *qemu_map_ram_ptr(RAMBlock
*ram_block
, ram_addr_t addr
)
2558 RAMBlock
*block
= ram_block
;
2560 if (block
== NULL
) {
2561 block
= qemu_get_ram_block(addr
);
2562 addr
-= block
->offset
;
2565 if (xen_enabled() && block
->host
== NULL
) {
2566 /* We need to check if the requested address is in the RAM
2567 * because we don't want to map the entire memory in QEMU.
2568 * In that case just map until the end of the page.
2570 if (block
->offset
== 0) {
2571 return xen_map_cache(addr
, 0, 0, false);
2574 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, false);
2576 return ramblock_ptr(block
, addr
);
2579 /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
2580 * but takes a size argument.
2582 * Called within RCU critical section.
2584 static void *qemu_ram_ptr_length(RAMBlock
*ram_block
, ram_addr_t addr
,
2585 hwaddr
*size
, bool lock
)
2587 RAMBlock
*block
= ram_block
;
2592 if (block
== NULL
) {
2593 block
= qemu_get_ram_block(addr
);
2594 addr
-= block
->offset
;
2596 *size
= MIN(*size
, block
->max_length
- addr
);
2598 if (xen_enabled() && block
->host
== NULL
) {
2599 /* We need to check if the requested address is in the RAM
2600 * because we don't want to map the entire memory in QEMU.
2601 * In that case just map the requested area.
2603 if (block
->offset
== 0) {
2604 return xen_map_cache(addr
, *size
, lock
, lock
);
2607 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, lock
);
2610 return ramblock_ptr(block
, addr
);
2613 /* Return the offset of a hostpointer within a ramblock */
2614 ram_addr_t
qemu_ram_block_host_offset(RAMBlock
*rb
, void *host
)
2616 ram_addr_t res
= (uint8_t *)host
- (uint8_t *)rb
->host
;
2617 assert((uintptr_t)host
>= (uintptr_t)rb
->host
);
2618 assert(res
< rb
->max_length
);
2624 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2627 * ptr: Host pointer to look up
2628 * round_offset: If true round the result offset down to a page boundary
2629 * *ram_addr: set to result ram_addr
2630 * *offset: set to result offset within the RAMBlock
2632 * Returns: RAMBlock (or NULL if not found)
2634 * By the time this function returns, the returned pointer is not protected
2635 * by RCU anymore. If the caller is not within an RCU critical section and
2636 * does not hold the iothread lock, it must have other means of protecting the
2637 * pointer, such as a reference to the region that includes the incoming
2640 RAMBlock
*qemu_ram_block_from_host(void *ptr
, bool round_offset
,
2644 uint8_t *host
= ptr
;
2646 if (xen_enabled()) {
2647 ram_addr_t ram_addr
;
2648 RCU_READ_LOCK_GUARD();
2649 ram_addr
= xen_ram_addr_from_mapcache(ptr
);
2650 block
= qemu_get_ram_block(ram_addr
);
2652 *offset
= ram_addr
- block
->offset
;
2657 RCU_READ_LOCK_GUARD();
2658 block
= atomic_rcu_read(&ram_list
.mru_block
);
2659 if (block
&& block
->host
&& host
- block
->host
< block
->max_length
) {
2663 RAMBLOCK_FOREACH(block
) {
2664 /* This case append when the block is not mapped. */
2665 if (block
->host
== NULL
) {
2668 if (host
- block
->host
< block
->max_length
) {
2676 *offset
= (host
- block
->host
);
2678 *offset
&= TARGET_PAGE_MASK
;
2684 * Finds the named RAMBlock
2686 * name: The name of RAMBlock to find
2688 * Returns: RAMBlock (or NULL if not found)
2690 RAMBlock
*qemu_ram_block_by_name(const char *name
)
2694 RAMBLOCK_FOREACH(block
) {
2695 if (!strcmp(name
, block
->idstr
)) {
2703 /* Some of the softmmu routines need to translate from a host pointer
2704 (typically a TLB entry) back to a ram offset. */
2705 ram_addr_t
qemu_ram_addr_from_host(void *ptr
)
2710 block
= qemu_ram_block_from_host(ptr
, false, &offset
);
2712 return RAM_ADDR_INVALID
;
2715 return block
->offset
+ offset
;
2718 /* Generate a debug exception if a watchpoint has been hit. */
2719 void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
2720 MemTxAttrs attrs
, int flags
, uintptr_t ra
)
2722 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
2725 assert(tcg_enabled());
2726 if (cpu
->watchpoint_hit
) {
2728 * We re-entered the check after replacing the TB.
2729 * Now raise the debug interrupt so that it will
2730 * trigger after the current instruction.
2732 qemu_mutex_lock_iothread();
2733 cpu_interrupt(cpu
, CPU_INTERRUPT_DEBUG
);
2734 qemu_mutex_unlock_iothread();
2738 addr
= cc
->adjust_watchpoint_address(cpu
, addr
, len
);
2739 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
2740 if (watchpoint_address_matches(wp
, addr
, len
)
2741 && (wp
->flags
& flags
)) {
2742 if (flags
== BP_MEM_READ
) {
2743 wp
->flags
|= BP_WATCHPOINT_HIT_READ
;
2745 wp
->flags
|= BP_WATCHPOINT_HIT_WRITE
;
2747 wp
->hitaddr
= MAX(addr
, wp
->vaddr
);
2748 wp
->hitattrs
= attrs
;
2749 if (!cpu
->watchpoint_hit
) {
2750 if (wp
->flags
& BP_CPU
&&
2751 !cc
->debug_check_watchpoint(cpu
, wp
)) {
2752 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
2755 cpu
->watchpoint_hit
= wp
;
2758 tb_check_watchpoint(cpu
, ra
);
2759 if (wp
->flags
& BP_STOP_BEFORE_ACCESS
) {
2760 cpu
->exception_index
= EXCP_DEBUG
;
2762 cpu_loop_exit_restore(cpu
, ra
);
2764 /* Force execution of one insn next time. */
2765 cpu
->cflags_next_tb
= 1 | curr_cflags();
2768 cpu_restore_state(cpu
, ra
, true);
2770 cpu_loop_exit_noexc(cpu
);
2774 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
2779 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
2780 MemTxAttrs attrs
, uint8_t *buf
, hwaddr len
);
2781 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2782 const uint8_t *buf
, hwaddr len
);
2783 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
2784 bool is_write
, MemTxAttrs attrs
);
2786 static MemTxResult
subpage_read(void *opaque
, hwaddr addr
, uint64_t *data
,
2787 unsigned len
, MemTxAttrs attrs
)
2789 subpage_t
*subpage
= opaque
;
2793 #if defined(DEBUG_SUBPAGE)
2794 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
"\n", __func__
,
2795 subpage
, len
, addr
);
2797 res
= flatview_read(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2801 *data
= ldn_p(buf
, len
);
2805 static MemTxResult
subpage_write(void *opaque
, hwaddr addr
,
2806 uint64_t value
, unsigned len
, MemTxAttrs attrs
)
2808 subpage_t
*subpage
= opaque
;
2811 #if defined(DEBUG_SUBPAGE)
2812 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
2813 " value %"PRIx64
"\n",
2814 __func__
, subpage
, len
, addr
, value
);
2816 stn_p(buf
, len
, value
);
2817 return flatview_write(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2820 static bool subpage_accepts(void *opaque
, hwaddr addr
,
2821 unsigned len
, bool is_write
,
2824 subpage_t
*subpage
= opaque
;
2825 #if defined(DEBUG_SUBPAGE)
2826 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx
"\n",
2827 __func__
, subpage
, is_write
? 'w' : 'r', len
, addr
);
2830 return flatview_access_valid(subpage
->fv
, addr
+ subpage
->base
,
2831 len
, is_write
, attrs
);
2834 static const MemoryRegionOps subpage_ops
= {
2835 .read_with_attrs
= subpage_read
,
2836 .write_with_attrs
= subpage_write
,
2837 .impl
.min_access_size
= 1,
2838 .impl
.max_access_size
= 8,
2839 .valid
.min_access_size
= 1,
2840 .valid
.max_access_size
= 8,
2841 .valid
.accepts
= subpage_accepts
,
2842 .endianness
= DEVICE_NATIVE_ENDIAN
,
2845 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
2850 if (start
>= TARGET_PAGE_SIZE
|| end
>= TARGET_PAGE_SIZE
)
2852 idx
= SUBPAGE_IDX(start
);
2853 eidx
= SUBPAGE_IDX(end
);
2854 #if defined(DEBUG_SUBPAGE)
2855 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2856 __func__
, mmio
, start
, end
, idx
, eidx
, section
);
2858 for (; idx
<= eidx
; idx
++) {
2859 mmio
->sub_section
[idx
] = section
;
2865 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
)
2869 /* mmio->sub_section is set to PHYS_SECTION_UNASSIGNED with g_malloc0 */
2870 mmio
= g_malloc0(sizeof(subpage_t
) + TARGET_PAGE_SIZE
* sizeof(uint16_t));
2873 memory_region_init_io(&mmio
->iomem
, NULL
, &subpage_ops
, mmio
,
2874 NULL
, TARGET_PAGE_SIZE
);
2875 mmio
->iomem
.subpage
= true;
2876 #if defined(DEBUG_SUBPAGE)
2877 printf("%s: %p base " TARGET_FMT_plx
" len %08x\n", __func__
,
2878 mmio
, base
, TARGET_PAGE_SIZE
);
2884 static uint16_t dummy_section(PhysPageMap
*map
, FlatView
*fv
, MemoryRegion
*mr
)
2887 MemoryRegionSection section
= {
2890 .offset_within_address_space
= 0,
2891 .offset_within_region
= 0,
2892 .size
= int128_2_64(),
2895 return phys_section_add(map
, §ion
);
2898 MemoryRegionSection
*iotlb_to_section(CPUState
*cpu
,
2899 hwaddr index
, MemTxAttrs attrs
)
2901 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
2902 CPUAddressSpace
*cpuas
= &cpu
->cpu_ases
[asidx
];
2903 AddressSpaceDispatch
*d
= atomic_rcu_read(&cpuas
->memory_dispatch
);
2904 MemoryRegionSection
*sections
= d
->map
.sections
;
2906 return §ions
[index
& ~TARGET_PAGE_MASK
];
2909 static void io_mem_init(void)
2911 memory_region_init_io(&io_mem_unassigned
, NULL
, &unassigned_mem_ops
, NULL
,
2915 AddressSpaceDispatch
*address_space_dispatch_new(FlatView
*fv
)
2917 AddressSpaceDispatch
*d
= g_new0(AddressSpaceDispatch
, 1);
2920 n
= dummy_section(&d
->map
, fv
, &io_mem_unassigned
);
2921 assert(n
== PHYS_SECTION_UNASSIGNED
);
2923 d
->phys_map
= (PhysPageEntry
) { .ptr
= PHYS_MAP_NODE_NIL
, .skip
= 1 };
2928 void address_space_dispatch_free(AddressSpaceDispatch
*d
)
2930 phys_sections_free(&d
->map
);
2934 static void do_nothing(CPUState
*cpu
, run_on_cpu_data d
)
2938 static void tcg_log_global_after_sync(MemoryListener
*listener
)
2940 CPUAddressSpace
*cpuas
;
2942 /* Wait for the CPU to end the current TB. This avoids the following
2946 * ---------------------- -------------------------
2947 * TLB check -> slow path
2948 * notdirty_mem_write
2952 * TLB check -> fast path
2956 * by pushing the migration thread's memory read after the vCPU thread has
2957 * written the memory.
2959 if (replay_mode
== REPLAY_MODE_NONE
) {
2961 * VGA can make calls to this function while updating the screen.
2962 * In record/replay mode this causes a deadlock, because
2963 * run_on_cpu waits for rr mutex. Therefore no races are possible
2964 * in this case and no need for making run_on_cpu when
2965 * record/replay is not enabled.
2967 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2968 run_on_cpu(cpuas
->cpu
, do_nothing
, RUN_ON_CPU_NULL
);
2972 static void tcg_commit(MemoryListener
*listener
)
2974 CPUAddressSpace
*cpuas
;
2975 AddressSpaceDispatch
*d
;
2977 assert(tcg_enabled());
2978 /* since each CPU stores ram addresses in its TLB cache, we must
2979 reset the modified entries */
2980 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2981 cpu_reloading_memory_map();
2982 /* The CPU and TLB are protected by the iothread lock.
2983 * We reload the dispatch pointer now because cpu_reloading_memory_map()
2984 * may have split the RCU critical section.
2986 d
= address_space_to_dispatch(cpuas
->as
);
2987 atomic_rcu_set(&cpuas
->memory_dispatch
, d
);
2988 tlb_flush(cpuas
->cpu
);
2991 static void memory_map_init(void)
2993 system_memory
= g_malloc(sizeof(*system_memory
));
2995 memory_region_init(system_memory
, NULL
, "system", UINT64_MAX
);
2996 address_space_init(&address_space_memory
, system_memory
, "memory");
2998 system_io
= g_malloc(sizeof(*system_io
));
2999 memory_region_init_io(system_io
, NULL
, &unassigned_io_ops
, NULL
, "io",
3001 address_space_init(&address_space_io
, system_io
, "I/O");
3004 MemoryRegion
*get_system_memory(void)
3006 return system_memory
;
3009 MemoryRegion
*get_system_io(void)
3014 #endif /* !defined(CONFIG_USER_ONLY) */
3016 /* physical memory access (slow version, mainly for debug) */
3017 #if defined(CONFIG_USER_ONLY)
3018 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
3019 uint8_t *buf
, target_ulong len
, int is_write
)
3022 target_ulong l
, page
;
3026 page
= addr
& TARGET_PAGE_MASK
;
3027 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
3030 flags
= page_get_flags(page
);
3031 if (!(flags
& PAGE_VALID
))
3034 if (!(flags
& PAGE_WRITE
))
3036 /* XXX: this code should not depend on lock_user */
3037 if (!(p
= lock_user(VERIFY_WRITE
, addr
, l
, 0)))
3040 unlock_user(p
, addr
, l
);
3042 if (!(flags
& PAGE_READ
))
3044 /* XXX: this code should not depend on lock_user */
3045 if (!(p
= lock_user(VERIFY_READ
, addr
, l
, 1)))
3048 unlock_user(p
, addr
, 0);
3059 static void invalidate_and_set_dirty(MemoryRegion
*mr
, hwaddr addr
,
3062 uint8_t dirty_log_mask
= memory_region_get_dirty_log_mask(mr
);
3063 addr
+= memory_region_get_ram_addr(mr
);
3065 /* No early return if dirty_log_mask is or becomes 0, because
3066 * cpu_physical_memory_set_dirty_range will still call
3067 * xen_modified_memory.
3069 if (dirty_log_mask
) {
3071 cpu_physical_memory_range_includes_clean(addr
, length
, dirty_log_mask
);
3073 if (dirty_log_mask
& (1 << DIRTY_MEMORY_CODE
)) {
3074 assert(tcg_enabled());
3075 tb_invalidate_phys_range(addr
, addr
+ length
);
3076 dirty_log_mask
&= ~(1 << DIRTY_MEMORY_CODE
);
3078 cpu_physical_memory_set_dirty_range(addr
, length
, dirty_log_mask
);
3081 void memory_region_flush_rom_device(MemoryRegion
*mr
, hwaddr addr
, hwaddr size
)
3084 * In principle this function would work on other memory region types too,
3085 * but the ROM device use case is the only one where this operation is
3086 * necessary. Other memory regions should use the
3087 * address_space_read/write() APIs.
3089 assert(memory_region_is_romd(mr
));
3091 invalidate_and_set_dirty(mr
, addr
, size
);
3094 static int memory_access_size(MemoryRegion
*mr
, unsigned l
, hwaddr addr
)
3096 unsigned access_size_max
= mr
->ops
->valid
.max_access_size
;
3098 /* Regions are assumed to support 1-4 byte accesses unless
3099 otherwise specified. */
3100 if (access_size_max
== 0) {
3101 access_size_max
= 4;
3104 /* Bound the maximum access by the alignment of the address. */
3105 if (!mr
->ops
->impl
.unaligned
) {
3106 unsigned align_size_max
= addr
& -addr
;
3107 if (align_size_max
!= 0 && align_size_max
< access_size_max
) {
3108 access_size_max
= align_size_max
;
3112 /* Don't attempt accesses larger than the maximum. */
3113 if (l
> access_size_max
) {
3114 l
= access_size_max
;
3121 static bool prepare_mmio_access(MemoryRegion
*mr
)
3123 bool unlocked
= !qemu_mutex_iothread_locked();
3124 bool release_lock
= false;
3126 if (unlocked
&& mr
->global_locking
) {
3127 qemu_mutex_lock_iothread();
3129 release_lock
= true;
3131 if (mr
->flush_coalesced_mmio
) {
3133 qemu_mutex_lock_iothread();
3135 qemu_flush_coalesced_mmio_buffer();
3137 qemu_mutex_unlock_iothread();
3141 return release_lock
;
3144 /* Called within RCU critical section. */
3145 static MemTxResult
flatview_write_continue(FlatView
*fv
, hwaddr addr
,
3148 hwaddr len
, hwaddr addr1
,
3149 hwaddr l
, MemoryRegion
*mr
)
3153 MemTxResult result
= MEMTX_OK
;
3154 bool release_lock
= false;
3157 if (!memory_access_is_direct(mr
, true)) {
3158 release_lock
|= prepare_mmio_access(mr
);
3159 l
= memory_access_size(mr
, l
, addr1
);
3160 /* XXX: could force current_cpu to NULL to avoid
3162 val
= ldn_he_p(buf
, l
);
3163 result
|= memory_region_dispatch_write(mr
, addr1
, val
,
3164 size_memop(l
), attrs
);
3167 ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
3168 memcpy(ptr
, buf
, l
);
3169 invalidate_and_set_dirty(mr
, addr1
, l
);
3173 qemu_mutex_unlock_iothread();
3174 release_lock
= false;
3186 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
3192 /* Called from RCU critical section. */
3193 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
3194 const uint8_t *buf
, hwaddr len
)
3199 MemTxResult result
= MEMTX_OK
;
3202 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
3203 result
= flatview_write_continue(fv
, addr
, attrs
, buf
, len
,
3209 /* Called within RCU critical section. */
3210 MemTxResult
flatview_read_continue(FlatView
*fv
, hwaddr addr
,
3211 MemTxAttrs attrs
, uint8_t *buf
,
3212 hwaddr len
, hwaddr addr1
, hwaddr l
,
3217 MemTxResult result
= MEMTX_OK
;
3218 bool release_lock
= false;
3221 if (!memory_access_is_direct(mr
, false)) {
3223 release_lock
|= prepare_mmio_access(mr
);
3224 l
= memory_access_size(mr
, l
, addr1
);
3225 result
|= memory_region_dispatch_read(mr
, addr1
, &val
,
3226 size_memop(l
), attrs
);
3227 stn_he_p(buf
, l
, val
);
3230 ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
3231 memcpy(buf
, ptr
, l
);
3235 qemu_mutex_unlock_iothread();
3236 release_lock
= false;
3248 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
3254 /* Called from RCU critical section. */
3255 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
3256 MemTxAttrs attrs
, uint8_t *buf
, hwaddr len
)
3263 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
3264 return flatview_read_continue(fv
, addr
, attrs
, buf
, len
,
3268 MemTxResult
address_space_read_full(AddressSpace
*as
, hwaddr addr
,
3269 MemTxAttrs attrs
, uint8_t *buf
, hwaddr len
)
3271 MemTxResult result
= MEMTX_OK
;
3275 RCU_READ_LOCK_GUARD();
3276 fv
= address_space_to_flatview(as
);
3277 result
= flatview_read(fv
, addr
, attrs
, buf
, len
);
3283 MemTxResult
address_space_write(AddressSpace
*as
, hwaddr addr
,
3285 const uint8_t *buf
, hwaddr len
)
3287 MemTxResult result
= MEMTX_OK
;
3291 RCU_READ_LOCK_GUARD();
3292 fv
= address_space_to_flatview(as
);
3293 result
= flatview_write(fv
, addr
, attrs
, buf
, len
);
3299 MemTxResult
address_space_rw(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
,
3300 uint8_t *buf
, hwaddr len
, bool is_write
)
3303 return address_space_write(as
, addr
, attrs
, buf
, len
);
3305 return address_space_read_full(as
, addr
, attrs
, buf
, len
);
3309 void cpu_physical_memory_rw(hwaddr addr
, uint8_t *buf
,
3310 hwaddr len
, int is_write
)
3312 address_space_rw(&address_space_memory
, addr
, MEMTXATTRS_UNSPECIFIED
,
3313 buf
, len
, is_write
);
3316 enum write_rom_type
{
3321 static inline MemTxResult
address_space_write_rom_internal(AddressSpace
*as
,
3326 enum write_rom_type type
)
3333 RCU_READ_LOCK_GUARD();
3336 mr
= address_space_translate(as
, addr
, &addr1
, &l
, true, attrs
);
3338 if (!(memory_region_is_ram(mr
) ||
3339 memory_region_is_romd(mr
))) {
3340 l
= memory_access_size(mr
, l
, addr1
);
3343 ptr
= qemu_map_ram_ptr(mr
->ram_block
, addr1
);
3346 memcpy(ptr
, buf
, l
);
3347 invalidate_and_set_dirty(mr
, addr1
, l
);
3350 flush_icache_range((uintptr_t)ptr
, (uintptr_t)ptr
+ l
);
3361 /* used for ROM loading : can write in RAM and ROM */
3362 MemTxResult
address_space_write_rom(AddressSpace
*as
, hwaddr addr
,
3364 const uint8_t *buf
, hwaddr len
)
3366 return address_space_write_rom_internal(as
, addr
, attrs
,
3367 buf
, len
, WRITE_DATA
);
3370 void cpu_flush_icache_range(hwaddr start
, hwaddr len
)
3373 * This function should do the same thing as an icache flush that was
3374 * triggered from within the guest. For TCG we are always cache coherent,
3375 * so there is no need to flush anything. For KVM / Xen we need to flush
3376 * the host's instruction cache at least.
3378 if (tcg_enabled()) {
3382 address_space_write_rom_internal(&address_space_memory
,
3383 start
, MEMTXATTRS_UNSPECIFIED
,
3384 NULL
, len
, FLUSH_CACHE
);
3395 static BounceBuffer bounce
;
3397 typedef struct MapClient
{
3399 QLIST_ENTRY(MapClient
) link
;
3402 QemuMutex map_client_list_lock
;
3403 static QLIST_HEAD(, MapClient
) map_client_list
3404 = QLIST_HEAD_INITIALIZER(map_client_list
);
3406 static void cpu_unregister_map_client_do(MapClient
*client
)
3408 QLIST_REMOVE(client
, link
);
3412 static void cpu_notify_map_clients_locked(void)
3416 while (!QLIST_EMPTY(&map_client_list
)) {
3417 client
= QLIST_FIRST(&map_client_list
);
3418 qemu_bh_schedule(client
->bh
);
3419 cpu_unregister_map_client_do(client
);
3423 void cpu_register_map_client(QEMUBH
*bh
)
3425 MapClient
*client
= g_malloc(sizeof(*client
));
3427 qemu_mutex_lock(&map_client_list_lock
);
3429 QLIST_INSERT_HEAD(&map_client_list
, client
, link
);
3430 if (!atomic_read(&bounce
.in_use
)) {
3431 cpu_notify_map_clients_locked();
3433 qemu_mutex_unlock(&map_client_list_lock
);
3436 void cpu_exec_init_all(void)
3438 qemu_mutex_init(&ram_list
.mutex
);
3439 /* The data structures we set up here depend on knowing the page size,
3440 * so no more changes can be made after this point.
3441 * In an ideal world, nothing we did before we had finished the
3442 * machine setup would care about the target page size, and we could
3443 * do this much later, rather than requiring board models to state
3444 * up front what their requirements are.
3446 finalize_target_page_bits();
3449 qemu_mutex_init(&map_client_list_lock
);
3452 void cpu_unregister_map_client(QEMUBH
*bh
)
3456 qemu_mutex_lock(&map_client_list_lock
);
3457 QLIST_FOREACH(client
, &map_client_list
, link
) {
3458 if (client
->bh
== bh
) {
3459 cpu_unregister_map_client_do(client
);
3463 qemu_mutex_unlock(&map_client_list_lock
);
3466 static void cpu_notify_map_clients(void)
3468 qemu_mutex_lock(&map_client_list_lock
);
3469 cpu_notify_map_clients_locked();
3470 qemu_mutex_unlock(&map_client_list_lock
);
3473 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
3474 bool is_write
, MemTxAttrs attrs
)
3481 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3482 if (!memory_access_is_direct(mr
, is_write
)) {
3483 l
= memory_access_size(mr
, l
, addr
);
3484 if (!memory_region_access_valid(mr
, xlat
, l
, is_write
, attrs
)) {
3495 bool address_space_access_valid(AddressSpace
*as
, hwaddr addr
,
3496 hwaddr len
, bool is_write
,
3502 RCU_READ_LOCK_GUARD();
3503 fv
= address_space_to_flatview(as
);
3504 result
= flatview_access_valid(fv
, addr
, len
, is_write
, attrs
);
3509 flatview_extend_translation(FlatView
*fv
, hwaddr addr
,
3511 MemoryRegion
*mr
, hwaddr base
, hwaddr len
,
3512 bool is_write
, MemTxAttrs attrs
)
3516 MemoryRegion
*this_mr
;
3522 if (target_len
== 0) {
3527 this_mr
= flatview_translate(fv
, addr
, &xlat
,
3528 &len
, is_write
, attrs
);
3529 if (this_mr
!= mr
|| xlat
!= base
+ done
) {
3535 /* Map a physical memory region into a host virtual address.
3536 * May map a subset of the requested range, given by and returned in *plen.
3537 * May return NULL if resources needed to perform the mapping are exhausted.
3538 * Use only for reads OR writes - not for read-modify-write operations.
3539 * Use cpu_register_map_client() to know when retrying the map operation is
3540 * likely to succeed.
3542 void *address_space_map(AddressSpace
*as
,
3559 RCU_READ_LOCK_GUARD();
3560 fv
= address_space_to_flatview(as
);
3561 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3563 if (!memory_access_is_direct(mr
, is_write
)) {
3564 if (atomic_xchg(&bounce
.in_use
, true)) {
3567 /* Avoid unbounded allocations */
3568 l
= MIN(l
, TARGET_PAGE_SIZE
);
3569 bounce
.buffer
= qemu_memalign(TARGET_PAGE_SIZE
, l
);
3573 memory_region_ref(mr
);
3576 flatview_read(fv
, addr
, MEMTXATTRS_UNSPECIFIED
,
3581 return bounce
.buffer
;
3585 memory_region_ref(mr
);
3586 *plen
= flatview_extend_translation(fv
, addr
, len
, mr
, xlat
,
3587 l
, is_write
, attrs
);
3588 ptr
= qemu_ram_ptr_length(mr
->ram_block
, xlat
, plen
, true);
3593 /* Unmaps a memory region previously mapped by address_space_map().
3594 * Will also mark the memory as dirty if is_write == 1. access_len gives
3595 * the amount of memory that was actually read or written by the caller.
3597 void address_space_unmap(AddressSpace
*as
, void *buffer
, hwaddr len
,
3598 int is_write
, hwaddr access_len
)
3600 if (buffer
!= bounce
.buffer
) {
3604 mr
= memory_region_from_host(buffer
, &addr1
);
3607 invalidate_and_set_dirty(mr
, addr1
, access_len
);
3609 if (xen_enabled()) {
3610 xen_invalidate_map_cache_entry(buffer
);
3612 memory_region_unref(mr
);
3616 address_space_write(as
, bounce
.addr
, MEMTXATTRS_UNSPECIFIED
,
3617 bounce
.buffer
, access_len
);
3619 qemu_vfree(bounce
.buffer
);
3620 bounce
.buffer
= NULL
;
3621 memory_region_unref(bounce
.mr
);
3622 atomic_mb_set(&bounce
.in_use
, false);
3623 cpu_notify_map_clients();
3626 void *cpu_physical_memory_map(hwaddr addr
,
3630 return address_space_map(&address_space_memory
, addr
, plen
, is_write
,
3631 MEMTXATTRS_UNSPECIFIED
);
3634 void cpu_physical_memory_unmap(void *buffer
, hwaddr len
,
3635 int is_write
, hwaddr access_len
)
3637 return address_space_unmap(&address_space_memory
, buffer
, len
, is_write
, access_len
);
3640 #define ARG1_DECL AddressSpace *as
3643 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3644 #define RCU_READ_LOCK(...) rcu_read_lock()
3645 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3646 #include "memory_ldst.inc.c"
3648 int64_t address_space_cache_init(MemoryRegionCache
*cache
,
3654 AddressSpaceDispatch
*d
;
3661 cache
->fv
= address_space_get_flatview(as
);
3662 d
= flatview_to_dispatch(cache
->fv
);
3663 cache
->mrs
= *address_space_translate_internal(d
, addr
, &cache
->xlat
, &l
, true);
3666 memory_region_ref(mr
);
3667 if (memory_access_is_direct(mr
, is_write
)) {
3668 /* We don't care about the memory attributes here as we're only
3669 * doing this if we found actual RAM, which behaves the same
3670 * regardless of attributes; so UNSPECIFIED is fine.
3672 l
= flatview_extend_translation(cache
->fv
, addr
, len
, mr
,
3673 cache
->xlat
, l
, is_write
,
3674 MEMTXATTRS_UNSPECIFIED
);
3675 cache
->ptr
= qemu_ram_ptr_length(mr
->ram_block
, cache
->xlat
, &l
, true);
3681 cache
->is_write
= is_write
;
3685 void address_space_cache_invalidate(MemoryRegionCache
*cache
,
3689 assert(cache
->is_write
);
3690 if (likely(cache
->ptr
)) {
3691 invalidate_and_set_dirty(cache
->mrs
.mr
, addr
+ cache
->xlat
, access_len
);
3695 void address_space_cache_destroy(MemoryRegionCache
*cache
)
3697 if (!cache
->mrs
.mr
) {
3701 if (xen_enabled()) {
3702 xen_invalidate_map_cache_entry(cache
->ptr
);
3704 memory_region_unref(cache
->mrs
.mr
);
3705 flatview_unref(cache
->fv
);
3706 cache
->mrs
.mr
= NULL
;
3710 /* Called from RCU critical section. This function has the same
3711 * semantics as address_space_translate, but it only works on a
3712 * predefined range of a MemoryRegion that was mapped with
3713 * address_space_cache_init.
3715 static inline MemoryRegion
*address_space_translate_cached(
3716 MemoryRegionCache
*cache
, hwaddr addr
, hwaddr
*xlat
,
3717 hwaddr
*plen
, bool is_write
, MemTxAttrs attrs
)
3719 MemoryRegionSection section
;
3721 IOMMUMemoryRegion
*iommu_mr
;
3722 AddressSpace
*target_as
;
3724 assert(!cache
->ptr
);
3725 *xlat
= addr
+ cache
->xlat
;
3728 iommu_mr
= memory_region_get_iommu(mr
);
3734 section
= address_space_translate_iommu(iommu_mr
, xlat
, plen
,
3735 NULL
, is_write
, true,
3740 /* Called from RCU critical section. address_space_read_cached uses this
3741 * out of line function when the target is an MMIO or IOMMU region.
3744 address_space_read_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3745 void *buf
, hwaddr len
)
3751 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, false,
3752 MEMTXATTRS_UNSPECIFIED
);
3753 flatview_read_continue(cache
->fv
,
3754 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3758 /* Called from RCU critical section. address_space_write_cached uses this
3759 * out of line function when the target is an MMIO or IOMMU region.
3762 address_space_write_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3763 const void *buf
, hwaddr len
)
3769 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, true,
3770 MEMTXATTRS_UNSPECIFIED
);
3771 flatview_write_continue(cache
->fv
,
3772 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3776 #define ARG1_DECL MemoryRegionCache *cache
3778 #define SUFFIX _cached_slow
3779 #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3780 #define RCU_READ_LOCK() ((void)0)
3781 #define RCU_READ_UNLOCK() ((void)0)
3782 #include "memory_ldst.inc.c"
3784 /* virtual memory access for debug (includes writing to ROM) */
3785 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
3786 uint8_t *buf
, target_ulong len
, int is_write
)
3789 target_ulong l
, page
;
3791 cpu_synchronize_state(cpu
);
3796 page
= addr
& TARGET_PAGE_MASK
;
3797 phys_addr
= cpu_get_phys_page_attrs_debug(cpu
, page
, &attrs
);
3798 asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
3799 /* if no physical page mapped, return an error */
3800 if (phys_addr
== -1)
3802 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
3805 phys_addr
+= (addr
& ~TARGET_PAGE_MASK
);
3807 address_space_write_rom(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3810 address_space_rw(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3821 * Allows code that needs to deal with migration bitmaps etc to still be built
3822 * target independent.
3824 size_t qemu_target_page_size(void)
3826 return TARGET_PAGE_SIZE
;
3829 int qemu_target_page_bits(void)
3831 return TARGET_PAGE_BITS
;
3834 int qemu_target_page_bits_min(void)
3836 return TARGET_PAGE_BITS_MIN
;
3840 bool target_words_bigendian(void)
3842 #if defined(TARGET_WORDS_BIGENDIAN)
3849 #ifndef CONFIG_USER_ONLY
3850 bool cpu_physical_memory_is_io(hwaddr phys_addr
)
3856 RCU_READ_LOCK_GUARD();
3857 mr
= address_space_translate(&address_space_memory
,
3858 phys_addr
, &phys_addr
, &l
, false,
3859 MEMTXATTRS_UNSPECIFIED
);
3861 res
= !(memory_region_is_ram(mr
) || memory_region_is_romd(mr
));
3865 int qemu_ram_foreach_block(RAMBlockIterFunc func
, void *opaque
)
3870 RCU_READ_LOCK_GUARD();
3871 RAMBLOCK_FOREACH(block
) {
3872 ret
= func(block
, opaque
);
3881 * Unmap pages of memory from start to start+length such that
3882 * they a) read as 0, b) Trigger whatever fault mechanism
3883 * the OS provides for postcopy.
3884 * The pages must be unmapped by the end of the function.
3885 * Returns: 0 on success, none-0 on failure
3888 int ram_block_discard_range(RAMBlock
*rb
, uint64_t start
, size_t length
)
3892 uint8_t *host_startaddr
= rb
->host
+ start
;
3894 if ((uintptr_t)host_startaddr
& (rb
->page_size
- 1)) {
3895 error_report("ram_block_discard_range: Unaligned start address: %p",
3900 if ((start
+ length
) <= rb
->used_length
) {
3901 bool need_madvise
, need_fallocate
;
3902 uint8_t *host_endaddr
= host_startaddr
+ length
;
3903 if ((uintptr_t)host_endaddr
& (rb
->page_size
- 1)) {
3904 error_report("ram_block_discard_range: Unaligned end address: %p",
3909 errno
= ENOTSUP
; /* If we are missing MADVISE etc */
3911 /* The logic here is messy;
3912 * madvise DONTNEED fails for hugepages
3913 * fallocate works on hugepages and shmem
3915 need_madvise
= (rb
->page_size
== qemu_host_page_size
);
3916 need_fallocate
= rb
->fd
!= -1;
3917 if (need_fallocate
) {
3918 /* For a file, this causes the area of the file to be zero'd
3919 * if read, and for hugetlbfs also causes it to be unmapped
3920 * so a userfault will trigger.
3922 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3923 ret
= fallocate(rb
->fd
, FALLOC_FL_PUNCH_HOLE
| FALLOC_FL_KEEP_SIZE
,
3927 error_report("ram_block_discard_range: Failed to fallocate "
3928 "%s:%" PRIx64
" +%zx (%d)",
3929 rb
->idstr
, start
, length
, ret
);
3934 error_report("ram_block_discard_range: fallocate not available/file"
3935 "%s:%" PRIx64
" +%zx (%d)",
3936 rb
->idstr
, start
, length
, ret
);
3941 /* For normal RAM this causes it to be unmapped,
3942 * for shared memory it causes the local mapping to disappear
3943 * and to fall back on the file contents (which we just
3944 * fallocate'd away).
3946 #if defined(CONFIG_MADVISE)
3947 ret
= madvise(host_startaddr
, length
, MADV_DONTNEED
);
3950 error_report("ram_block_discard_range: Failed to discard range "
3951 "%s:%" PRIx64
" +%zx (%d)",
3952 rb
->idstr
, start
, length
, ret
);
3957 error_report("ram_block_discard_range: MADVISE not available"
3958 "%s:%" PRIx64
" +%zx (%d)",
3959 rb
->idstr
, start
, length
, ret
);
3963 trace_ram_block_discard_range(rb
->idstr
, host_startaddr
, length
,
3964 need_madvise
, need_fallocate
, ret
);
3966 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
3967 "/%zx/" RAM_ADDR_FMT
")",
3968 rb
->idstr
, start
, length
, rb
->used_length
);
3975 bool ramblock_is_pmem(RAMBlock
*rb
)
3977 return rb
->flags
& RAM_PMEM
;
3982 void page_size_init(void)
3984 /* NOTE: we can always suppose that qemu_host_page_size >=
3986 if (qemu_host_page_size
== 0) {
3987 qemu_host_page_size
= qemu_real_host_page_size
;
3989 if (qemu_host_page_size
< TARGET_PAGE_SIZE
) {
3990 qemu_host_page_size
= TARGET_PAGE_SIZE
;
3992 qemu_host_page_mask
= -(intptr_t)qemu_host_page_size
;
3995 #if !defined(CONFIG_USER_ONLY)
3997 static void mtree_print_phys_entries(int start
, int end
, int skip
, int ptr
)
3999 if (start
== end
- 1) {
4000 qemu_printf("\t%3d ", start
);
4002 qemu_printf("\t%3d..%-3d ", start
, end
- 1);
4004 qemu_printf(" skip=%d ", skip
);
4005 if (ptr
== PHYS_MAP_NODE_NIL
) {
4006 qemu_printf(" ptr=NIL");
4008 qemu_printf(" ptr=#%d", ptr
);
4010 qemu_printf(" ptr=[%d]", ptr
);
4015 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
4016 int128_sub((size), int128_one())) : 0)
4018 void mtree_print_dispatch(AddressSpaceDispatch
*d
, MemoryRegion
*root
)
4022 qemu_printf(" Dispatch\n");
4023 qemu_printf(" Physical sections\n");
4025 for (i
= 0; i
< d
->map
.sections_nb
; ++i
) {
4026 MemoryRegionSection
*s
= d
->map
.sections
+ i
;
4027 const char *names
[] = { " [unassigned]", " [not dirty]",
4028 " [ROM]", " [watch]" };
4030 qemu_printf(" #%d @" TARGET_FMT_plx
".." TARGET_FMT_plx
4033 s
->offset_within_address_space
,
4034 s
->offset_within_address_space
+ MR_SIZE(s
->mr
->size
),
4035 s
->mr
->name
? s
->mr
->name
: "(noname)",
4036 i
< ARRAY_SIZE(names
) ? names
[i
] : "",
4037 s
->mr
== root
? " [ROOT]" : "",
4038 s
== d
->mru_section
? " [MRU]" : "",
4039 s
->mr
->is_iommu
? " [iommu]" : "");
4042 qemu_printf(" alias=%s", s
->mr
->alias
->name
?
4043 s
->mr
->alias
->name
: "noname");
4048 qemu_printf(" Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
4049 P_L2_BITS
, P_L2_LEVELS
, d
->phys_map
.ptr
, d
->phys_map
.skip
);
4050 for (i
= 0; i
< d
->map
.nodes_nb
; ++i
) {
4053 Node
*n
= d
->map
.nodes
+ i
;
4055 qemu_printf(" [%d]\n", i
);
4057 for (j
= 0, jprev
= 0, prev
= *n
[0]; j
< ARRAY_SIZE(*n
); ++j
) {
4058 PhysPageEntry
*pe
= *n
+ j
;
4060 if (pe
->ptr
== prev
.ptr
&& pe
->skip
== prev
.skip
) {
4064 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);
4070 if (jprev
!= ARRAY_SIZE(*n
)) {
4071 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);