2020-12-15 | Vikram Garhwal | arm: xlnx-versal: Connect usb to virt-versal Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com> |
commitcommitdifftree |
2020-12-15 | Vikram Garhwal | usb: Add DWC3 model Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com> |
commitcommitdifftree |
2020-12-10 | Vikram Garhwal | MAINTAINERS: Add maintainer entry for Xilinx ZynqMP... Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com> |
commitcommitdifftree |
2020-12-10 | Vikram Garhwal | tests/qtest: Introduce tests for Xilinx ZynqMP CAN... Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com> |
commitcommitdifftree |
2020-12-10 | Vikram Garhwal | xlnx-zynqmp: Connect Xilinx ZynqMP CAN controllers Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com> |
commitcommitdifftree |
2020-12-10 | Vikram Garhwal | hw/net/can: Introduce Xilinx ZynqMP CAN controller Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com> |
commitcommitdifftree |