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target-arm: A64: Move handle_2misc_narrow function
2014-03-17
Alex Bennée
ta
r
get-arm: A64:
Move handle_2
m
isc
_
n
a
rrow function
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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2014-03-17
Alex Bennée
targ
e
t-arm:
A
6
4:
Imple
m
ent AdvSIMD reciprocal est
i
mate
.
.
.
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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2014-03-17
Al
e
x
B
e
n
né
e
softfloa
t
: export squa
s
h_input_denorma
l
funct
i
ons
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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2014-03-17
Ale
x
Bennée
target
-
a
r
m: A
6
4: A
d
d FRECPX (reciproc
a
l
ex
p
onent)
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-17
A
l
ex
B
ennée
t
a
rge
t
-arm:
A
64
:
Saturating an
d
narrowing s
h
ift ops
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-17
Alex Bennée
target-arm: A64
:
A
dd remain
i
ng CLS/Z vect
o
r ops
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-17
Alex
B
ennée
target-ar
m
: A64: Add FS
Q
RT to
C
3
.
6
.
17
(two mis
c
)
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-17
A
le
x
Bennée
target-arm: A64: Add la
s
t AdvSIMD Integer
t
o FP ops
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
commitdiff
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2014-03-17
Ale
x
Bennée
targ
e
t-
a
rm: A64: Fix bug in add_su
b
_ex
t
hand
l
i
n
g of rn
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-15
Alex Bennée
.
tr
a
v
i
s
.
yml: add I
R
C n
o
tific
a
t
ions for bu
i
ld
failures
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
commit
|
commitdiff
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2014-03-15
Alex Bennée
.
travis
.
yml: t
r
ivial
whitespa
c
e fix
u
p
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-15
Alex
B
e
nnée
.
tr
a
vis
.
y
m
l: r
e
-en
a
ble
l
ttng use
r
s
pace trace test
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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|
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2014-03-15
Alex B
e
nnée
.
trav
i
s
.
yml: add a new bu
i
ld t
a
rg
e
t
w
ith n
o
n-core devlibs
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-02-20
Alex
Benn
é
e
target-arm:
A64:
I
mplemen
t
floating p
o
int p
a
irw
i
se
.
.
.
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-02-20
Alex Bennée
target-arm: A64: Implement
S
IMD FP
com
p
are and set
.
.
.
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-02-08
Alex Bennée
target-arm: A6
4
:
A
d
d 2-r
e
g-misc REV*
instructio
n
s
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-01-31
A
lex Benn
é
e
target-arm: A64: Add SIM
D
shift
b
y
immediate
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-01-31
Al
e
x Ben
n
ée
target-arm: A64: Add SIMD modified immedia
t
e gro
u
p
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-01-31
Alex
Be
n
née
t
a
rg
e
t-a
r
m: A6
4
:
A
d
d SIMD
copy operations
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-01-31
A
l
e
x
B
e
n
n
ée
t
a
rget-
a
r
m
: A6
4
:
A
dd decode sk
e
leton for SIMD data
.
.
.
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-01-31
Ale
x
B
enné
e
ta
r
get-
a
rm: A6
4
:
Add SIMD
l
d/st mu
l
ti
p
le
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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|
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2014-01-08
Al
e
x Bennée
.
travis
.
yml:
A
dd aarch64-*
targets
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
commit
|
commitdiff
|
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2014-01-07
A
lex Bennée
.
travis
.
yml:
A
dd aar
c
h6
4
-*
targets
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2013-12-23
Alex Bennée
tar
g
e
t
-
ar
m
: A64: add support
f
o
r
move wide instructions
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2013-12-23
A
l
ex Bennée
targe
t
-arm: A64: add support for
add, addi, sub
,
subi
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2013-12-23
Alex Bennée
target-arm: A64:
add su
p
port for ld/st with inde
x
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2013-12-23
Alex Bennée
target-arm: A
6
4
:
add
su
p
port fo
r
ld
/
st w
i
th reg offset
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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2013-12-23
Alex B
e
nnée
targ
e
t-arm: A64: add supp
o
rt fo
r
ld/st
u
nsigned imm
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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