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hw/timer: RX62N 8-Bit timer (TMR)
2020-06-22 Yoshinori Satohw/timer: RX62N 8-Bit timer (TMR)
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
...Id: <20200224141923.82118-16-ysato@users.sourceforge.jp>
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2020-06-22 Yoshinori Satohw/intc: RX62N interrupt controller (ICUa)
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
...Id: <20200224141923.82118-15-ysato@users.sourceforge.jp>
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2020-03-19 Yoshinori SatoAdd rx-softmmu
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
...Id: <20200224141923.82118-21-ysato@users.sourceforge.jp>
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2020-03-19 Yoshinori Satotarget/rx: RX disassembler
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
...Id: <20200224141923.82118-8-ysato@users.sourceforge.jp>
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2020-03-19 Yoshinori Satotarget/rx: CPU definitions
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
...Id: <20200224141923.82118-7-ysato@users.sourceforge.jp>
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2020-03-19 Yoshinori Satotarget/rx: TCG helpers
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
...Id: <20200224141923.82118-6-ysato@users.sourceforge.jp>
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2020-03-19 Yoshinori Satotarget/rx: TCG translation
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
...Id: <20200224141923.82118-5-ysato@users.sourceforge.jp>
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2020-03-19 Yoshinori SatoMAINTAINERS: Add entry for the Renesas RX architecture
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
...Id: <20200224141923.82118-2-ysato@users.sourceforge.jp>
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2020-03-19 Yoshinori Satohw/registerfields.h: Add 8bit and 16bit register macros
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
...Id: <20200224141923.82118-4-ysato@users.sourceforge.jp>
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2020-02-25 Yoshinori Satoqemu/bitops.h: Add extract8 and extract16
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
...Id: <20200212130311.127515-3-ysato@users.sourceforge.jp>
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AR7 emulation for QEMU