2022-01-12 | Philippe Mathieu... | tests/tcg: Fix target-specific Makefile variables path... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211226001541.3807919-1-f4bug@amsat.org> |
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2022-01-06 | Philippe Mathieu... | linux-user: Mark cpu_loop() with noreturn attribute ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211106113916.544587-1-f4bug@amsat.org> |
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2022-01-06 | Philippe Mathieu... | linux-user/hexagon: Use generic target_stat64 structure ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211116210919.2823206-1-f4bug@amsat.org> |
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2022-01-04 | Philippe Mathieu... | linux-user: Fix trivial build error on loongarch64... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20220104215027.2180972-1-f4bug@amsat.org> |
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2022-01-04 | Philippe Mathieu... | hw/sd/sdcard: Rename Write Protect Group variables ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210728181728.2012952-4-f4bug@amsat.org> |
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2021-12-31 | Philippe Mathieu... | hw/qdev: Rename qdev_connect_gpio_out*() 'input_pin... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211218130437.1516929-5-f4bug@amsat.org> |
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2021-12-31 | Philippe Mathieu... | hw/qdev: Correct qdev_connect_gpio_out_named() documentation ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211218130437.1516929-4-f4bug@amsat.org> |
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2021-12-31 | Philippe Mathieu... | hw/qdev: Correct qdev_init_gpio_out_named() documentation ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211218130437.1516929-3-f4bug@amsat.org> |
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2021-12-31 | Philippe Mathieu... | hw/qdev: Cosmetic around documentation ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211218130437.1516929-2-f4bug@amsat.org> |
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2021-12-18 | Philippe Mathieu... | hw/i386/vmmouse: Require 'i8042' property to be set ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211201223253.36080-1-f4bug@amsat.org> |
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2021-12-18 | Philippe Mathieu... | hw/scsi: Fix scsi_bus_init_named() docstring ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211122104744.1051554-1-f4bug@amsat.org> |
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2021-12-17 | Philippe Mathieu... | hw/avr: Realize AVRCPU qdev object using qdev_realize() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211205224109.322152-1-f4bug@amsat.org> |
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2021-11-29 | Philippe Mathieu... | MAINTAINERS: Add section for Aarch64 GitLab custom... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211116163226.2719320-1-f4bug@amsat.org> |
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2021-11-22 | Philippe Mathieu... | hw/misc/sifive_u_otp: Do not reset OTP content on hardware... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211119104757.331579-1-f4bug@amsat.org> |
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2021-11-11 | Philippe Mathieu... | tcg: Remove TCI experimental status ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211106111457.517546-1-f4bug@amsat.org> |
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2021-11-11 | Philippe Mathieu... | hw/mem/pc-dimm: Restrict NUMA-specific code to NUMA... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211106145016.611332-1-f4bug@amsat.org> |
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2021-11-09 | Philippe Mathieu... | .mailmap: Fix more contributor entries ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211027043254.1248097-1-f4bug@amsat.org> |
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2021-11-09 | Philippe Mathieu... | hw/m68k: Fix typo in SPDX tag ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211103105311.3399293-1-f4bug@amsat.org> |
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2021-11-08 | Philippe Mathieu... | tests/avocado: Rename avocado_qemu.Test -> QemuSystemTest ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211105143416.148332-7-f4bug@amsat.org> |
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2021-11-08 | Philippe Mathieu... | tests/avocado: Add bFLT loader linux-user test ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211105143416.148332-6-f4bug@amsat.org> |
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2021-11-08 | Philippe Mathieu... | tests/avocado: Share useful helpers from virtiofs_submounts... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211105143416.148332-5-f4bug@amsat.org> |
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2021-11-08 | Philippe Mathieu... | tests/avocado: Introduce QemuUserTest base class ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211105143416.148332-4-f4bug@amsat.org> |
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2021-11-08 | Philippe Mathieu... | tests/avocado: Make pick_default_qemu_bin() more generic ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211105143416.148332-3-f4bug@amsat.org> |
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2021-11-08 | Philippe Mathieu... | tests/avocado: Extract QemuBaseTest from Test ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211105143416.148332-2-f4bug@amsat.org> |
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2021-11-08 | Philippe Mathieu... | ui/gtk-egl: Fix build failure when libgbm is not available ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211108083129.1262040-1-f4bug@amsat.org> |
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2021-11-04 | Philippe Mathieu... | tests/tcg: Fix some targets default cross compiler... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211023164329.328137-1-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/arm: Use tcg_constant_i32() in gen_rev16() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211029231834.2476117-6-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/arm: Use tcg_constant_i64() in do_sat_addsub_64() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211029231834.2476117-5-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/arm: Use the constant variant of store_cpu_field... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211029231834.2476117-4-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/arm: Introduce store_cpu_field_constant() helper ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211029231834.2476117-3-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/arm: Use tcg_constant_i32() in op_smlad() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211029231834.2476117-2-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | Revert "elf: Relax MIPS' elf_check_arch() to accept... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211101114800.2692157-1-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Remove obsolete FCR0_HAS2008 comment on... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028212103.2126176-1-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Fix Loongson-3A4000 MSAIR config register ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211026180920.1085516-1-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Remove one MSA unnecessary decodetree... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-32-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Remove generic MSA opcode ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-31-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert CTCMSA opcode to decodetree ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-30-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert CFCMSA opcode to decodetree ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-29-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA MOVE.V opcode to decodetree ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-28-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA COPY_S and INSERT opcodes... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-27-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA COPY_U opcode to decodetree ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-26-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA ELM instruction format to... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-25-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA 3R instruction format to decodetree... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-24-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA 3R instruction format to decodetree... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-23-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA 3R instruction format to decodetree... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-22-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA 3R instruction format to decodetree... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-21-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA 3RF instruction format to... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-20-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA 3RF instruction format to... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-19-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA VEC instruction format to... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-18-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA 2R instruction format to decodetree ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-17-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA FILL opcode to decodetree ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-16-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA 2RF instruction format to... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-15-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA load/store instruction format... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-14-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA I8 instruction format to decodetree ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-13-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA SHF opcode to decodetree ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-12-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA BIT instruction format to... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-11-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA I5 instruction format to decodetree ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-10-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Convert MSA LDI opcode to decodetree ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-9-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Rename sa16 -> sa, bz_df -> bz -> bz_v ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-8-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Use enum definitions from CPUMIPSMSADataFormat... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-7-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Have check_msa_access() return a boolean ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-6-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Use dup_const() to simplify ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-5-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Adjust style in msa_translate_init() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211023214803.522078-34-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Fix MSA MSUBV.B opcode ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-3-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | target/mips: Fix MSA MADDV.B opcode ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211028210843.2120802-2-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | MAINTAINERS: Split MIPS TCG frontend vs MIPS machines... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211004092515.3819836-4-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | MAINTAINERS: Add entries to cover MIPS CPS / GIC hardware ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211027041416.1237433-3-f4bug@amsat.org> |
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2021-11-02 | Philippe Mathieu... | MAINTAINERS: Add MIPS general architecture support... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211004092515.3819836-2-f4bug@amsat.org> |
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2021-10-31 | Philippe Mathieu... | hw/input/lasips2: Fix typos in function names ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210920064048.2729397-2-f4bug@amsat.org> |
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2021-10-31 | Philippe Mathieu... | MAINTAINERS: Split HPPA TCG vs HPPA machines/hardware ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211004083835.3802961-1-f4bug@amsat.org> |
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2021-10-22 | Philippe Mathieu... | disas/nios2: Simplify endianess conversion ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210807110939.95853-3-f4bug@amsat.org> |
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2021-10-22 | Philippe Mathieu... | disas/nios2: Fix style in print_insn_nios2() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210807110939.95853-2-f4bug@amsat.org> |
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2021-10-21 | Philippe Mathieu... | target/ppc: Use tcg_constant_i64() in gen_brh() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211003141711.3673181-3-f4bug@amsat.org> |
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2021-10-21 | Philippe Mathieu... | target/ppc: Use tcg_constant_i32() in gen_setb() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211003141711.3673181-2-f4bug@amsat.org> |
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2021-10-17 | Philippe Mathieu... | target/mips: Remove unused TCG temporary in gen_mipsdsp_acci... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211014224551.2204949-1-f4bug@amsat.org> |
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2021-10-17 | Philippe Mathieu... | target/mips: Fix DEXTRV_S.H DSP opcode ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211013215652.1764551-1-f4bug@amsat.org> |
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2021-10-17 | Philippe Mathieu... | target/mips: Use tcg_constant_tl() in gen_compute_compact_br... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211003175743.3738710-9-f4bug@amsat.org> |
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2021-10-17 | Philippe Mathieu... | target/mips: Use explicit extract32() calls in gen_msa_i5() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211003175743.3738710-7-f4bug@amsat.org> |
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2021-10-17 | Philippe Mathieu... | target/mips: Use tcg_constant_i32() in gen_msa_3rf() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211003175743.3738710-6-f4bug@amsat.org> |
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2021-10-17 | Philippe Mathieu... | target/mips: Use tcg_constant_i32() in gen_msa_2r() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211003175743.3738710-5-f4bug@amsat.org> |
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2021-10-17 | Philippe Mathieu... | target/mips: Use tcg_constant_i32() in gen_msa_2rf() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211003175743.3738710-4-f4bug@amsat.org> |
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2021-10-17 | Philippe Mathieu... | target/mips: Use tcg_constant_i32() in gen_msa_elm_df() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211003175743.3738710-3-f4bug@amsat.org> |
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2021-10-17 | Philippe Mathieu... | target/mips: Remove unused register from MSA 2R/2RF... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211003175743.3738710-2-f4bug@amsat.org> |
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2021-10-17 | Philippe Mathieu... | target/mips: Check nanoMIPS DSP MULT[U] accumulator... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-10-06 | Philippe Mathieu... | hw/char/mchp_pfsoc_mmuart: QOM'ify PolarFire MMUART ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210925133407.1259392-4-f4bug@amsat.org |
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2021-10-06 | Philippe Mathieu... | hw/char/mchp_pfsoc_mmuart: Use a MemoryRegion container ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210925133407.1259392-3-f4bug@amsat.org |
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2021-10-06 | Philippe Mathieu... | hw/char/mchp_pfsoc_mmuart: Simplify MCHP_PFSOC_MMUART_REG... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210925133407.1259392-2-f4bug@amsat.org |
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2021-10-06 | Philippe Mathieu... | target/hexagon: Use tcg_constant_* ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211003004750.3608983-3-f4bug@amsat.org> |
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2021-10-06 | Philippe Mathieu... | target/hexagon: Remove unused TCG temporary from predicated... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20211003004750.3608983-2-f4bug@amsat.org> |
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2021-10-05 | Philippe Mathieu... | hw/i386/amd_iommu: Add description/category to TYPE_AMD_IOMM... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210926175648.1649075-4-f4bug@amsat.org> |
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2021-10-05 | Philippe Mathieu... | hw/i386/amd_iommu: Rename SysBus specific functions... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210926175648.1649075-3-f4bug@amsat.org> |
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2021-10-05 | Philippe Mathieu... | hw/i386/amd_iommu: Rename amdviPCI TypeInfo ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210926175648.1649075-2-f4bug@amsat.org> |
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2021-10-04 | Philippe Mathieu... | hw/remote/proxy: Categorize Wireless devices as 'Network... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210926201926.1690896-1-f4bug@amsat.org> |
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2021-09-22 | Philippe Mathieu... | accel/tcg: Restrict cpu_handle_halt() to sysemu ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210912172731.789788-2-f4bug@amsat.org> |
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2021-09-16 | Philippe Mathieu... | target/sparc: Make sparc_cpu_dump_state() static ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210916084002.1918445-1-f4bug@amsat.org> |
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2021-09-14 | Philippe Mathieu... | user: Remove cpu_get_pic_interrupt() stubs ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210911165434.531552-25-f4bug@amsat.org> |
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2021-09-14 | Philippe Mathieu... | accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt(... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210911165434.531552-24-f4bug@amsat.org> |
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2021-09-14 | Philippe Mathieu... | target/xtensa: Restrict cpu_exec_interrupt() handler... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210911165434.531552-23-f4bug@amsat.org> |
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2021-09-14 | Philippe Mathieu... | target/rx: Restrict cpu_exec_interrupt() handler to... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210911165434.531552-22-f4bug@amsat.org> |
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2021-09-14 | Philippe Mathieu... | target/sparc: Restrict cpu_exec_interrupt() handler... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210911165434.531552-21-f4bug@amsat.org> |
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