2020-03-28 | Richard Henderson | configure: Support -static-pie if requested ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-28 | Richard Henderson | configure: Override the os default with --disable-pie ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-28 | Richard Henderson | configure: Unnest detection of -z,relro and -z,now ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-28 | Richard Henderson | configure: Always detect -no-pie toolchain support ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-28 | Richard Henderson | configure: Do not force pie=no for non-x86 ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-28 | Richard Henderson | tcg: Remove softmmu code_gen_buffer fixed address ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-28 | Richard Henderson | configure: Drop adjustment of textseg ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-26 | Richard Henderson | linux-user: Flush out implementation of gettimeofday ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20200213032223.14643-6-richard.henderson@linaro.org> |
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2020-03-26 | Richard Henderson | linux-user: Add x86_64 vsyscall page to /proc/self... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20200213032223.14643-5-richard.henderson@linaro.org> |
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2020-03-26 | Richard Henderson | linux-user/i386: Emulate x86_64 vsyscalls ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20200213032223.14643-4-richard.henderson@linaro.org> |
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2020-03-26 | Richard Henderson | linux-user/i386: Split out gen_signal ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20200213032223.14643-3-richard.henderson@linaro.org> |
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2020-03-26 | Richard Henderson | target/i386: Renumber EXCP_SYSCALL ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20200213032223.14643-2-richard.henderson@linaro.org> |
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2020-03-23 | Richard Henderson | target/arm: Move computation of index in handle_simd_dupe ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200320160622.8040-4-richard.henderson@linaro.org |
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2020-03-23 | Richard Henderson | target/arm: Assert immh != 0 in disas_simd_shift_imm ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200320160622.8040-3-richard.henderson@linaro.org |
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2020-03-23 | Richard Henderson | target/arm: Rearrange disabled check for watchpoints ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200320160622.8040-2-richard.henderson@linaro.org |
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2020-03-19 | Richard Henderson | target/rx: Dump bytes for each insn during disassembly ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190531134315.4109-24-richard.henderson@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-19 | Richard Henderson | target/rx: Collect all bytes during disassembly ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190531134315.4109-23-richard.henderson@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-19 | Richard Henderson | target/rx: Emit all disassembly in one prt() ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190531134315.4109-22-richard.henderson@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-19 | Richard Henderson | target/rx: Use prt_ldmi for XCHG_mr disassembly ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190531134315.4109-21-richard.henderson@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-19 | Richard Henderson | target/rx: Replace operand with prt_ldmi in disassembler ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190531134315.4109-20-richard.henderson@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-19 | Richard Henderson | target/rx: Disassemble rx_index_addr into a string ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190531134315.4109-19-richard.henderson@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-17 | Richard Henderson | tcg: Remove tcg-runtime-gvec.c DO_CMP0 ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-17 | Richard Henderson | tcg: Tidy tcg-runtime-gvec.c DUP* ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-17 | Richard Henderson | tcg: Tidy tcg-runtime-gvec.c types ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-17 | Richard Henderson | tcg: Remove CONFIG_VECTOR16 ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-17 | Richard Henderson | tcg/i386: Bound shift count expanding sari_vec ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2020-03-12 | Richard Henderson | target/arm: Disable clean_data_tbi for system mode ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200308012946.16303-3-richard.henderson@linaro.org |
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2020-03-12 | Richard Henderson | target/arm: Check addresses for disabled regimes ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200308012946.16303-2-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Clean address for DC ZVA ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200302175829.2183-8-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200302175829.2183-7-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Move helper_dc_zva to helper-a64.c ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200302175829.2183-6-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Apply TBI to ESR_ELx in helper_exception_return ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200302175829.2183-5-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Introduce core_to_aa64_mmu_idx ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200302175829.2183-4-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Optimize cpu_mmu_index ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200302175829.2183-3-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Replicate TBI/TBID bits for single range... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200302175829.2183-2-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | tests/tcg/aarch64: Add newline in pauth-1 printf ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200229012811.24129-13-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Honor the HCR_EL2.TTLB bit ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200229012811.24129-12-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Honor the HCR_EL2.TPU bit ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200229012811.24129-11-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Honor the HCR_EL2.TPCP bit ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200229012811.24129-10-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Honor the HCR_EL2.TACR bit ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200229012811.24129-9-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Honor the HCR_EL2.TSW bit ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200229012811.24129-8-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Honor the HCR_EL2.{TVM,TRVM} bits ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200229012811.24129-7-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Improve masking in arm_hcr_el2_eff ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200229012811.24129-6-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Remove EL2 and EL3 setup from user-only ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200229012811.24129-5-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Disable has_el2 and has_el3 for user-only ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200229012811.24129-4-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Add HCR_EL2 bit definitions from ARMv8.6 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200229012811.24129-3-richard.henderson@linaro.org |
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2020-03-05 | Richard Henderson | target/arm: Improve masking of HCR/HCR2 RES0 bits ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200229012811.24129-2-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Split VMINMAXNM decode ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-18-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Split VFM decode ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-17-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Add formats for some vfp 2 and 3-register... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-16-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Remove ARM_FEATURE_VFP* ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-15-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | linux-user/arm: Replace ARM_FEATURE_VFP* tests for... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-14-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Move the vfp decodetree calls next to the... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-13-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Move VLLDM and VLSTM to vfp.decode ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-12-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Remove ARM_FEATURE_VFP check from disas_vfp_insn ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-11-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-10-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Add missing checks for fpsp_v2 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-9-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Replace ARM_FEATURE_VFP3 checks with fp... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-8-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Perform fpdp_v2 check first ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-7-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Add isar_feature_aa64_fp_simd, isar_feature_aa32_vfp ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-5-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Add isar_feature_aa32_{fpsp_v2, fpsp_v3... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-4-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Rename isar_feature_aa32_fpdp_v2 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-3-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Add isar_feature_aa32_vfp_simd ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200224222232.13807-2-richard.henderson@linaro.org |
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2020-02-28 | Richard Henderson | target/arm: Set ID_MMFR4.HPDS for aarch64_max_initfn ...off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200218190958.745-2-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Set MVFR0.FPSP for ARMv5 cpus ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200214181547.21408-5-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Use isar_feature_aa32_simd_r32 more places ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200214181547.21408-4-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Rename isar_feature_aa32_simd_r32 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200214181547.21408-3-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Convert PMULL.8 to gvec ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200216214232.4230-5-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Convert PMULL.64 to gvec ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200216214232.4230-4-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Convert PMUL.8 to gvec ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200216214232.4230-3-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Vectorize USHL and SSHL ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200216214232.4230-2-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Split out aa64_va_parameter_tbi, aa64_va_paramet... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200216194343.21331-5-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Remove ttbr1_valid check from get_phys_addr_lpae ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200216194343.21331-4-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Fix select for aa64_va_parameters_both ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200216194343.21331-3-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Use bit 55 explicitly for pauth ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200216194343.21331-2-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Flush high bits of sve register after AdvSIMD INS ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200214194643.23317-5-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Flush high bits of sve register after AdvSIMD... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200214194643.23317-4-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Flush high bits of sve register after AdvSIMD... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200214194643.23317-3-richard.henderson@linaro.org |
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2020-02-21 | Richard Henderson | target/arm: Flush high bits of sve register after AdvSIMD EXT ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200214194643.23317-2-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Enable ARMv8.2-UAO in -cpu max ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-21-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Implement UAO semantics ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-20-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Update MSR access to UAO ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-19-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Add ID_AA64MMFR2_EL1 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-18-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Enable ARMv8.2-ATS1E1 in -cpu max ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-17-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Implement ATS1E1 system registers ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-16-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Set PAN bit as required on exception entry ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-15-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Enforce PAN semantics in get_S1prot ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-14-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Update arm_mmu_idx_el for PAN ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-13-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Update MSR access for PAN ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-12-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Introduce aarch64_pstate_valid_mask ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-11-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Remove CPSR_RESERVED ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-10-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Use aarch32_cpsr_valid_mask in helper_exception_... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-9-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Replace CPSR_ERET_MASK with aarch32_cpsr_valid_mask ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-8-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Mask CPSR_J when Jazelle is not enabled ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-7-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Split out aarch32_cpsr_valid_mask ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-6-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Move LOR regdefs to file scope ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-5-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Add isar_feature tests for PAN + ATS1E1 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-4-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-3-richard.henderson@linaro.org |
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2020-02-13 | Richard Henderson | target/arm: Add arm_mmu_idx_is_stage1_of_2 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20200208125816.14954-2-richard.henderson@linaro.org |
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2020-02-12 | Richard Henderson | tcg: Add tcg_gen_gvec_5_ptr ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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