From e03291cd9a9f511a70a9164bbe8673ed1e9de360 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sat, 3 Jun 2023 09:48:07 -0700 Subject: [PATCH] target/sh4: Emit insn_start for each insn in gUSA region MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Fixes an assert in tcg_gen_code that we don't accidentally eliminate an insn_start during optimization. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/sh4/translate.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 9d2c7a3337..76f46d268b 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -2146,9 +2146,7 @@ static void decode_gusa(DisasContext *ctx, CPUSH4State *env) /* The entire region has been translated. */ ctx->envflags &= ~TB_FLAG_GUSA_MASK; - ctx->base.pc_next = pc_end; - ctx->base.num_insns += max_insns - 1; - return; + goto done; fail: qemu_log_mask(LOG_UNIMP, "Unrecognized gUSA sequence %08x-%08x\n", @@ -2165,8 +2163,19 @@ static void decode_gusa(DisasContext *ctx, CPUSH4State *env) purposes of accounting within the TB. We might as well report the entire region consumed via ctx->base.pc_next so that it's immediately available in the disassembly dump. */ + + done: ctx->base.pc_next = pc_end; ctx->base.num_insns += max_insns - 1; + + /* + * Emit insn_start to cover each of the insns in the region. + * This matches an assert in tcg.c making sure that we have + * tb->icount * insn_start. + */ + for (i = 1; i < max_insns; ++i) { + tcg_gen_insn_start(pc + i * 2, ctx->envflags); + } } #endif -- 2.11.4.GIT