From ca1d323ca504e68af2c1b19dc99ec73054359507 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 22 Nov 2023 18:16:38 +0100 Subject: [PATCH] hw/arm/bcm2836: Simplify use of 'reset-cbar' property MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit bcm2836_realize() is called by - bcm2836_class_init() which sets: bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7") - bcm2837_class_init() which sets: bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53") Both Cortex-A7 / A53 have the ARM_FEATURE_CBAR set. If it isn't, then this is a programming error: use &error_abort. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Peter Maydell Message-Id: <20231123143813.42632-3-philmd@linaro.org> --- hw/arm/bcm2836.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index 166dc896c0..a1bd1406e1 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -131,10 +131,8 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) s->cpu[n].core.mp_affinity = (bc->clusterid << 8) | n; /* set periphbase/CBAR value for CPU-local registers */ - if (!object_property_set_int(OBJECT(&s->cpu[n].core), "reset-cbar", - bc->peri_base, errp)) { - return; - } + object_property_set_int(OBJECT(&s->cpu[n].core), "reset-cbar", + bc->peri_base, &error_abort); /* start powered off if not enabled */ if (!object_property_set_bool(OBJECT(&s->cpu[n].core), -- 2.11.4.GIT