From ba21dc991be87ee8e15d124a80b27ce626a77b14 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 3 Nov 2023 10:38:32 -0700 Subject: [PATCH] target/sparc: Use i128 for Fdmulq Signed-off-by: Richard Henderson Tested-by: Mark Cave-Ayland Acked-by: Mark Cave-Ayland Message-Id: <20231103173841.33651-14-richard.henderson@linaro.org> --- target/sparc/fop_helper.c | 8 ++++---- target/sparc/helper.h | 2 +- target/sparc/translate.c | 15 ++++----------- 3 files changed, 9 insertions(+), 16 deletions(-) diff --git a/target/sparc/fop_helper.c b/target/sparc/fop_helper.c index 9a0110e201..cd9b212597 100644 --- a/target/sparc/fop_helper.c +++ b/target/sparc/fop_helper.c @@ -129,11 +129,11 @@ float64 helper_fsmuld(CPUSPARCState *env, float32 src1, float32 src2) &env->fp_status); } -void helper_fdmulq(CPUSPARCState *env, float64 src1, float64 src2) +Int128 helper_fdmulq(CPUSPARCState *env, float64 src1, float64 src2) { - QT0 = float128_mul(float64_to_float128(src1, &env->fp_status), - float64_to_float128(src2, &env->fp_status), - &env->fp_status); + return f128_ret(float128_mul(float64_to_float128(src1, &env->fp_status), + float64_to_float128(src2, &env->fp_status), + &env->fp_status)); } /* Integer to float conversion. */ diff --git a/target/sparc/helper.h b/target/sparc/helper.h index 20f67f89b0..f7aeb31169 100644 --- a/target/sparc/helper.h +++ b/target/sparc/helper.h @@ -84,7 +84,7 @@ DEF_HELPER_FLAGS_3(fmuls, TCG_CALL_NO_RWG, f32, env, f32, f32) DEF_HELPER_FLAGS_3(fdivs, TCG_CALL_NO_RWG, f32, env, f32, f32) DEF_HELPER_FLAGS_3(fsmuld, TCG_CALL_NO_RWG, f64, env, f32, f32) -DEF_HELPER_FLAGS_3(fdmulq, TCG_CALL_NO_RWG, void, env, f64, f64) +DEF_HELPER_FLAGS_3(fdmulq, TCG_CALL_NO_RWG, i128, env, f64, f64) DEF_HELPER_FLAGS_2(fitod, TCG_CALL_NO_RWG_SE, f64, env, s32) DEF_HELPER_FLAGS_2(fitoq, TCG_CALL_NO_RWG, i128, env, s32) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index d478a2fcd0..d12de5ae5c 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -276,14 +276,6 @@ static void gen_store_fpr_Q(DisasContext *dc, unsigned int dst, TCGv_i128 v) gen_update_fprs_dirty(dc, dst); } -static void gen_op_store_QT0_fpr(unsigned int dst) -{ - tcg_gen_ld_i64(cpu_fpr[dst / 2], tcg_env, offsetof(CPUSPARCState, qt0) + - offsetof(CPU_QuadU, ll.upper)); - tcg_gen_ld_i64(cpu_fpr[dst/2 + 1], tcg_env, offsetof(CPUSPARCState, qt0) + - offsetof(CPU_QuadU, ll.lower)); -} - /* moves */ #ifdef CONFIG_USER_ONLY #define supervisor(dc) 0 @@ -4992,6 +4984,7 @@ TRANS(FDIVq, ALL, do_env_qqq, a, gen_helper_fdivq) static bool trans_FdMULq(DisasContext *dc, arg_r_r_r *a) { TCGv_i64 src1, src2; + TCGv_i128 dst; if (gen_trap_ifnofpu(dc)) { return true; @@ -5003,10 +4996,10 @@ static bool trans_FdMULq(DisasContext *dc, arg_r_r_r *a) gen_op_clear_ieee_excp_and_FTT(); src1 = gen_load_fpr_D(dc, a->rs1); src2 = gen_load_fpr_D(dc, a->rs2); - gen_helper_fdmulq(tcg_env, src1, src2); + dst = tcg_temp_new_i128(); + gen_helper_fdmulq(dst, tcg_env, src1, src2); gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env); - gen_op_store_QT0_fpr(QFPREG(a->rd)); - gen_update_fprs_dirty(dc, QFPREG(a->rd)); + gen_store_fpr_Q(dc, a->rd, dst); return advance_pc(dc); } -- 2.11.4.GIT