From a7c1fadf00027d8ff16326f4ea1548e3fdbc4a55 Mon Sep 17 00:00:00 2001 From: Aurelien Jarno Date: Tue, 9 May 2017 10:27:58 +0200 Subject: [PATCH] target/s390x: mask the SIGP order_code using SIGP_ORDER_MASK MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit For that move the definition from kvm.c to cpu.h Reviewed-by: Thomas Huth Reviewed-by: Cornelia Huck Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Aurelien Jarno Message-Id: <20170509082800.10756-2-aurelien@aurel32.net> Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 3 +++ target/s390x/kvm.c | 2 -- target/s390x/misc_helper.c | 3 +-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index bbed32006c..240b8a5c22 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -1078,6 +1078,9 @@ struct sysib_322 { #define SIGP_MODE_Z_ARCH_TRANS_ALL_PSW 1 #define SIGP_MODE_Z_ARCH_TRANS_CUR_PSW 2 +/* SIGP order code mask corresponding to bit positions 56-63 */ +#define SIGP_ORDER_MASK 0x000000ff + void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr); int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, target_ulong *raddr, int *flags, bool exc); diff --git a/target/s390x/kvm.c b/target/s390x/kvm.c index 1a249d8359..fb105429be 100644 --- a/target/s390x/kvm.c +++ b/target/s390x/kvm.c @@ -1764,8 +1764,6 @@ static int sigp_set_architecture(S390CPU *cpu, uint32_t param, return SIGP_CC_ORDER_CODE_ACCEPTED; } -#define SIGP_ORDER_MASK 0x000000ff - static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) { CPUS390XState *env = &cpu->env; diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index bd94242270..23ec52cf35 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -517,8 +517,7 @@ uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1, /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register" as parameter (input). Status (output) is always R1. */ - /* sigp contains the order code in bit positions 56-63, mask it here. */ - switch (order_code & 0xff) { + switch (order_code & SIGP_ORDER_MASK) { case SIGP_SET_ARCH: /* switch arch */ break; -- 2.11.4.GIT