From a58dfba20168dae18650ad70f47af99be55b1c45 Mon Sep 17 00:00:00 2001 From: "Dr. David Alan Gilbert" Date: Tue, 30 Jul 2019 10:37:18 +0100 Subject: [PATCH] pcie_root_port: Allow ACS to be disabled ACS was added in 4.0 unconditionally, this breaks migration compatibility. Allow ACS to be disabled by adding a property that's checked by pcie_root_port. Unfortunately pcie-root-port doesn't have any instance data, so there's no where for that flag to live, so stuff it into PCIESlot. Signed-off-by: Dr. David Alan Gilbert Message-Id: <20190730093719.12958-2-dgilbert@redhat.com> Reviewed-by: Igor Mammedov Reviewed-by: Juan Quintela Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/pci-bridge/pcie_root_port.c | 3 ++- include/hw/pci/pcie_port.h | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c index 09019ca05d..1d8a778709 100644 --- a/hw/pci-bridge/pcie_root_port.c +++ b/hw/pci-bridge/pcie_root_port.c @@ -111,7 +111,7 @@ static void rp_realize(PCIDevice *d, Error **errp) pcie_aer_root_init(d); rp_aer_vector_update(d); - if (rpc->acs_offset) { + if (rpc->acs_offset && !s->disable_acs) { pcie_acs_init(d, rpc->acs_offset); } return; @@ -145,6 +145,7 @@ static void rp_exit(PCIDevice *d) static Property rp_props[] = { DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present, QEMU_PCIE_SLTCAP_PCP_BITNR, true), + DEFINE_PROP_BOOL("disable-acs", PCIESlot, disable_acs, false), DEFINE_PROP_END_OF_LIST() }; diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h index 09586f4641..7515430087 100644 --- a/include/hw/pci/pcie_port.h +++ b/include/hw/pci/pcie_port.h @@ -53,6 +53,8 @@ struct PCIESlot { PCIExpLinkSpeed speed; PCIExpLinkWidth width; + /* Disable ACS (really for a pcie_root_port) */ + bool disable_acs; QLIST_ENTRY(PCIESlot) next; }; -- 2.11.4.GIT