From 92ecfab50ee2b30e60c774f96f05fc38714874f1 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sun, 13 Jun 2021 16:27:13 -0700 Subject: [PATCH] target/mips: Fix gen_mxu_s32ldd_s32lddr MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit There were two bugs here: (1) the required endianness was not present in the MemOp, and (2) we were not providing a zero-extended input to the bswap as semantics required. The best fix is to fold the bswap into the memory operation, producing the desired result directly. Acked-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/mips/tcg/mxu_translate.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/target/mips/tcg/mxu_translate.c b/target/mips/tcg/mxu_translate.c index 3f35e46399..f52244e1b2 100644 --- a/target/mips/tcg/mxu_translate.c +++ b/target/mips/tcg/mxu_translate.c @@ -857,12 +857,8 @@ static void gen_mxu_s32ldd_s32lddr(DisasContext *ctx) tcg_gen_ori_tl(t1, t1, 0xFFFFF000); } tcg_gen_add_tl(t1, t0, t1); - tcg_gen_qemu_ld_tl(t1, t1, ctx->mem_idx, MO_SL); + tcg_gen_qemu_ld_tl(t1, t1, ctx->mem_idx, MO_TESL ^ (sel * MO_BSWAP)); - if (sel == 1) { - /* S32LDDR */ - tcg_gen_bswap32_tl(t1, t1, TCG_BSWAP_IZ | TCG_BSWAP_OZ); - } gen_store_mxu_gpr(t1, XRa); tcg_temp_free(t0); -- 2.11.4.GIT