From 83b955f9a8d149c31eea015020e7cbb25918839d Mon Sep 17 00:00:00 2001 From: David Hildenbrand Date: Wed, 29 May 2019 22:27:21 +0200 Subject: [PATCH] s390x/tcg: Implement VECTOR FP TEST DATA CLASS IMMEDIATE We can reuse float64_dcmask(). Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/helper.h | 2 ++ target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 21 +++++++++++++++++++++ target/s390x/vec_fpu_helper.c | 37 +++++++++++++++++++++++++++++++++++++ 4 files changed, 62 insertions(+) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index c788fc1b7f..e9aff83b05 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -292,6 +292,8 @@ DEF_HELPER_FLAGS_4(gvec_vfsq64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) DEF_HELPER_FLAGS_4(gvec_vfsq64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) DEF_HELPER_FLAGS_5(gvec_vfs64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_5(gvec_vfs64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32) +DEF_HELPER_4(gvec_vftci64, void, ptr, cptr, env, i32) +DEF_HELPER_4(gvec_vftci64s, void, ptr, cptr, env, i32) #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 4426f40250..f421184fcd 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1246,6 +1246,8 @@ F(0xe7ce, VFSQ, VRR_a, V, 0, 0, 0, 0, vfsq, 0, IF_VEC) /* VECTOR FP SUBTRACT */ F(0xe7e2, VFS, VRR_c, V, 0, 0, 0, 0, vfa, 0, IF_VEC) +/* VECTOR FP TEST DATA CLASS IMMEDIATE */ + F(0xe74a, VFTCI, VRI_e, V, 0, 0, 0, 0, vftci, 0, IF_VEC) #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c index c0a19aa9f3..69c675e411 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -2801,3 +2801,24 @@ static DisasJumpType op_vfsq(DisasContext *s, DisasOps *o) 0, fn); return DISAS_NEXT; } + +static DisasJumpType op_vftci(DisasContext *s, DisasOps *o) +{ + const uint16_t i3 = get_field(s->fields, i3); + const uint8_t fpf = get_field(s->fields, m4); + const uint8_t m5 = get_field(s->fields, m5); + gen_helper_gvec_2_ptr *fn = gen_helper_gvec_vftci64; + + if (fpf != FPF_LONG || extract32(m5, 0, 3)) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + if (extract32(m5, 3, 1)) { + fn = gen_helper_gvec_vftci64s; + } + gen_gvec_2_ptr(get_field(s->fields, v1), get_field(s->fields, v2), cpu_env, + i3, fn); + set_cc_static(s); + return DISAS_NEXT; +} diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c index ccdc975628..a48bd704bc 100644 --- a/target/s390x/vec_fpu_helper.c +++ b/target/s390x/vec_fpu_helper.c @@ -586,3 +586,40 @@ void HELPER(gvec_vfs64s)(void *v1, const void *v2, const void *v3, { vop64_3(v1, v2, v3, env, true, vfs64, GETPC()); } + +static int vftci64(S390Vector *v1, const S390Vector *v2, CPUS390XState *env, + bool s, uint16_t i3) +{ + int i, match = 0; + + for (i = 0; i < 2; i++) { + float64 a = s390_vec_read_element64(v2, i); + + if (float64_dcmask(env, a) & i3) { + match++; + s390_vec_write_element64(v1, i, -1ull); + } else { + s390_vec_write_element64(v1, i, 0); + } + if (s) { + break; + } + } + + if (match) { + return s || match == 2 ? 0 : 1; + } + return 3; +} + +void HELPER(gvec_vftci64)(void *v1, const void *v2, CPUS390XState *env, + uint32_t desc) +{ + env->cc_op = vftci64(v1, v2, env, false, simd_data(desc)); +} + +void HELPER(gvec_vftci64s)(void *v1, const void *v2, CPUS390XState *env, + uint32_t desc) +{ + env->cc_op = vftci64(v1, v2, env, true, simd_data(desc)); +} -- 2.11.4.GIT