From 6aaeb05492ef668f415324f43e7d875c0f1e90b3 Mon Sep 17 00:00:00 2001 From: Babu Moger Date: Thu, 10 May 2018 15:41:42 -0500 Subject: [PATCH] i386: Add cache information in X86CPUDefinition Add cache information in X86CPUDefinition and CPUX86State. Signed-off-by: Babu Moger Tested-by: Geoffrey McRae Reviewed-by: Eduardo Habkost Message-Id: <20180510204148.11687-3-babu.moger@amd.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 1 + target/i386/cpu.h | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 28bb93990e..55685ed19d 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1106,6 +1106,7 @@ struct X86CPUDefinition { int stepping; FeatureWordArray features; const char *model_id; + CPUCaches *cache_info; }; static X86CPUDefinition builtin_x86_defs[] = { diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 512c69dddd..ac94013c4a 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1097,6 +1097,12 @@ typedef struct CPUCacheInfo { } CPUCacheInfo; +typedef struct CPUCaches { + CPUCacheInfo l1d_cache; + CPUCacheInfo l1i_cache; + CPUCacheInfo l2_cache; + CPUCacheInfo l3_cache; +} CPUCaches; typedef struct CPUX86State { /* standard registers */ @@ -1286,6 +1292,7 @@ typedef struct CPUX86State { /* Features that were explicitly enabled/disabled */ FeatureWordArray user_features; uint32_t cpuid_model[12]; + CPUCaches *cache_info; /* MTRRs */ uint64_t mtrr_fixed[11]; -- 2.11.4.GIT