From 681c247833430edb4d91a8fd9c754f470a9f2074 Mon Sep 17 00:00:00 2001 From: Nikunj A Dadhania Date: Fri, 9 Dec 2016 17:47:22 +0530 Subject: [PATCH] target-ppc: implement stxvl instruction MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit stxvl: Store VSX Vector with Length Vector (8-bit elements) in BE: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ Vector (8-bit elements) in LE: +--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ |00|00|“T”|“S”|“E”|“T”|“ ”|“a”|“ ”|“s”|“i”|“ ”|“s”|“i”|"h"|"T"| +--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ Storing 14 bytes would result in following Little/Big-endian Storage: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson --- target/ppc/helper.h | 1 + target/ppc/mem_helper.c | 29 +++++++++++++++++++++++++++++ target/ppc/translate/vsx-impl.inc.c | 1 + target/ppc/translate/vsx-ops.inc.c | 3 +++ 4 files changed, 34 insertions(+) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 6a9344eef6..218a022d48 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -315,6 +315,7 @@ DEF_HELPER_3(stvewx, void, env, avr, tl) #if defined(TARGET_PPC64) DEF_HELPER_4(lxvl, void, env, tl, tl, tl) DEF_HELPER_4(lxvll, void, env, tl, tl, tl) +DEF_HELPER_4(stxvl, void, env, tl, tl, tl) #endif DEF_HELPER_4(vsumsws, void, env, avr, avr, avr) DEF_HELPER_4(vsum2sws, void, env, avr, avr, avr) diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index da514657b6..2427b49018 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -317,6 +317,35 @@ void helper_##name(CPUPPCState *env, target_ulong addr, \ VSX_LXVL(lxvl, 0) VSX_LXVL(lxvll, 1) #undef VSX_LXVL + +#define VSX_STXVL(name, lj) \ +void helper_##name(CPUPPCState *env, target_ulong addr, \ + target_ulong xt_num, target_ulong rb) \ +{ \ + int i; \ + ppc_vsr_t xt; \ + target_ulong nb = GET_NB(rb); \ + \ + if (!nb) { \ + return; \ + } \ + getVSR(xt_num, &xt, env); \ + nb = (nb >= 16) ? 16 : nb; \ + if (msr_le && !lj) { \ + for (i = 16; i > 16 - nb; i--) { \ + cpu_stb_data_ra(env, addr, xt.VsrB(i - 1), GETPC()); \ + addr = addr_add(env, addr, 1); \ + } \ + } else { \ + for (i = 0; i < nb; i++) { \ + cpu_stb_data_ra(env, addr, xt.VsrB(i), GETPC()); \ + addr = addr_add(env, addr, 1); \ + } \ + } \ +} + +VSX_STXVL(stxvl, 0) +#undef VSX_STXVL #undef GET_NB #endif /* TARGET_PPC64 */ diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c index ce20579fa3..5099d447ee 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -268,6 +268,7 @@ static void gen_##name(DisasContext *ctx) \ VSX_VECTOR_LOAD_STORE_LENGTH(lxvl) VSX_VECTOR_LOAD_STORE_LENGTH(lxvll) +VSX_VECTOR_LOAD_STORE_LENGTH(stxvl) #endif #define VSX_LOAD_SCALAR_DS(name, operation) \ diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-ops.inc.c index c207804ef5..3afded2b36 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -25,6 +25,9 @@ GEN_HANDLER_E(stxvw4x, 0x1F, 0xC, 0x1C, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(stxvh8x, 0x1F, 0x0C, 0x1D, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(stxvb16x, 0x1F, 0x0C, 0x1F, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(stxvx, 0x1F, 0x0C, 0x0C, 0, PPC_NONE, PPC2_ISA300), +#if defined(TARGET_PPC64) +GEN_HANDLER_E(stxvl, 0x1F, 0x0D, 0x0C, 0, PPC_NONE, PPC2_ISA300), +#endif GEN_HANDLER_E(mfvsrwz, 0x1F, 0x13, 0x03, 0x0000F800, PPC_NONE, PPC2_VSX207), GEN_HANDLER_E(mtvsrwa, 0x1F, 0x13, 0x06, 0x0000F800, PPC_NONE, PPC2_VSX207), -- 2.11.4.GIT