| commit | f61c3fb56bfad1d76422fa80d18ae5e39a47d61d | |
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Wed, 17 Jun 2020 07:25:29 +0000 (17 09:25 +0200) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Tue, 23 Jun 2020 10:39:47 +0000 (23 11:39 +0100) | ||
| tree | ab4cda3786a4af9048a56f445145378bd9489b6f | treesnapshot (tar.gz zip) |
| parent | cfcfbae0a1028383d7c084fc4cd3ee958ef78d71 | commitdiff |
hw/i2c: Add header for ARM SBCon two-wire serial bus interface
'ARM SBCon two-wire serial bus interface' is the official
name describing the pair of registers used to bitbanging
I2C in the Versatile boards.
Make the private VersatileI2CState structure as public
ArmSbconI2CState.
Add the TYPE_ARM_SBCON_I2C, alias to our current
TYPE_VERSATILE_I2C model.
Rename the memory region description as 'arm_sbcon_i2c'.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20200617072539.32686-5-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
'ARM SBCon two-wire serial bus interface' is the official
name describing the pair of registers used to bitbanging
I2C in the Versatile boards.
Make the private VersatileI2CState structure as public
ArmSbconI2CState.
Add the TYPE_ARM_SBCON_I2C, alias to our current
TYPE_VERSATILE_I2C model.
Rename the memory region description as 'arm_sbcon_i2c'.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20200617072539.32686-5-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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| hw/i2c/versatile_i2c.c | diffblobblamehistory | |
| include/hw/i2c/arm_sbcon_i2c.h | [new file with mode: 0644] | blob |