| commit | f48cc9020b6a1b41f7ccc639a09fecc5a6b42ad1 | |
| author | Richard Henderson <richard.henderson@linaro.org> | |
| Mon, 3 Apr 2023 05:06:53 +0000 (2 22:06 -0700) | ||
| committer | Richard Henderson <richard.henderson@linaro.org> | |
| Thu, 11 May 2023 08:53:41 +0000 (11 09:53 +0100) | ||
| tree | 11411cbb00ba5c929b4ba9ff818b4efab1ddbcaa | treesnapshot (tar.gz zip) |
| parent | 2f2a3d1d0b11416aa39cd6127d9632318c7e345b | commitdiff |
tcg/mips: Simplify constraints on qemu_ld/st
The softmmu tlb uses TCG_REG_TMP[0-3], not any of the normally available
registers. Now that we handle overlap betwen inputs and helper arguments,
and have eliminated use of A0, we can allow any allocatable reg.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
The softmmu tlb uses TCG_REG_TMP[0-3], not any of the normally available
registers. Now that we handle overlap betwen inputs and helper arguments,
and have eliminated use of A0, we can allow any allocatable reg.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| tcg/mips/tcg-target-con-set.h | diffblobblamehistory | |
| tcg/mips/tcg-target-con-str.h | diffblobblamehistory | |
| tcg/mips/tcg-target.c.inc | diffblobblamehistory |