target/riscv: access cfg structure through DisasContext
commitf2a32bec8f0da993f67698b6c7ebd60e0f19622e
authorPhilipp Tomsich <philipp.tomsich@vrull.eu>
Wed, 2 Feb 2022 00:52:46 +0000 (2 01:52 +0100)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 16 Feb 2022 02:24:18 +0000 (16 12:24 +1000)
tree88051d4e3c0f884cb4debd17e94066acdb359c4e
parent79bf3b51acb4a6245b500005859e8b1d1611302f
target/riscv: access cfg structure through DisasContext

The Zb[abcs] support code still uses the RISCV_CPU macros to access
the configuration information (i.e., check whether an extension is
available/enabled).  Now that we provide this information directly
from DisasContext, we can access this directly via the cfg_ptr field.

Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220202005249.3566542-5-philipp.tomsich@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/insn_trans/trans_rvb.c.inc