aspeed/soc: Add AST2600 support
commitf25c0ae1079dc0b9de02676eb3e3949a09df9f41
authorCédric Le Goater <clg@kaod.org>
Wed, 25 Sep 2019 14:32:43 +0000 (25 16:32 +0200)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 15 Oct 2019 17:09:05 +0000 (15 18:09 +0100)
tree54daedfc11c7eff597965c98e8e26ca1f1228a00
parent54ecafb7f98bddd75af0573e5ff6bbdf93de4da9
aspeed/soc: Add AST2600 support

Initial definitions for a simple machine using an AST2600 SoC (Cortex
CPU).

The Cortex CPU and its interrupt controller are too complex to handle
in the common Aspeed SoC framework. We introduce a new Aspeed SoC
class with instance_init and realize handlers to handle the differences
with the AST2400 and the AST2500 SoCs. This will add extra work to
keep in sync both models with future extensions but it makes the code
clearer.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190925143248.10000-19-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/Makefile.objs
hw/arm/aspeed_ast2600.c [new file with mode: 0644]
include/hw/arm/aspeed_soc.h