RISC-V: Simplify riscv_cpu_local_irqs_pending
commitefbdbc26a9fc69c222113abd9b80aa38a036fb6b
authorMichael Clark <mjc@sifive.com>
Thu, 19 Apr 2018 01:19:06 +0000 (19 13:19 +1200)
committerAlistair Francis <alistair.francis@wdc.com>
Tue, 4 Sep 2018 20:19:37 +0000 (4 13:19 -0700)
tree723dfc36aaaface4dc4b704905598088cd82f839
parentd78940ec5d07d3b514f2fd8f941c58118fce2815
RISC-V: Simplify riscv_cpu_local_irqs_pending

This commit is intended to improve readability.
There is no change to the logic.

Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/helper.c