| commit | edf647864bdab84ed4b1a4f47ea05be6bb075c69 | |
| author | Sylvain Pelissier <sylvain.pelissier@gmail.com> | |
| Wed, 6 Jan 2021 20:41:41 +0000 (6 21:41 +0100) | ||
| committer | Alistair Francis <alistair.francis@wdc.com> | |
| Sat, 16 Jan 2021 18:57:21 +0000 (16 10:57 -0800) | ||
| tree | 8d65d5c060d356978eafc18c4e1e62d4c16cd6e6 | treesnapshot (tar.gz zip) |
| parent | 465ef47abe3fd0722cf50a6073ccd9520bdbee95 | commitdiff |
gdb: riscv: Add target description
Target description is not currently implemented in RISC-V
architecture. Thus GDB won't set it properly when attached.
The patch implements the target description response.
Signed-off-by: Sylvain Pelissier <sylvain.pelissier@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210106204141.14027-1-sylvain.pelissier@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Target description is not currently implemented in RISC-V
architecture. Thus GDB won't set it properly when attached.
The patch implements the target description response.
Signed-off-by: Sylvain Pelissier <sylvain.pelissier@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210106204141.14027-1-sylvain.pelissier@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| target/riscv/cpu.c | diffblobblamehistory |