| commit | e967413fe0f2f3fe022658bb279aef95d24210ec | |
| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | |
| Wed, 13 Sep 2023 13:25:23 +0000 (13 14:25 +0100) | ||
| committer | Michael S. Tsirkin <mst@redhat.com> | |
| Wed, 4 Oct 2023 22:15:06 +0000 (4 18:15 -0400) | ||
| tree | 3eb67a2a6c57b3cd54284811570bd2b38ec1cbf8 | treesnapshot (tar.gz zip) |
| parent | 61c44bcf510f4db51c28d0288e528cfdf0ebabc3 | commitdiff |
hw/cxl: Support 4 HDM decoders at all levels of topology
Support these decoders in CXL host bridges (pxb-cxl), CXL Switch USP
and CXL Type 3 end points.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230913132523.29780-5-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Support these decoders in CXL host bridges (pxb-cxl), CXL Switch USP
and CXL Type 3 end points.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230913132523.29780-5-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| hw/cxl/cxl-component-utils.c | diffblobblamehistory | |
| hw/cxl/cxl-host.c | diffblobblamehistory | |
| hw/mem/cxl_type3.c | diffblobblamehistory | |
| include/hw/cxl/cxl_component.h | diffblobblamehistory |