target/arm: Implement FEAT_E0PD
commite4c93e44ab103f6c67abd85d620343f61aafa004
authorPeter Maydell <peter.maydell@linaro.org>
Fri, 21 Oct 2022 16:01:31 +0000 (21 17:01 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 27 Oct 2022 09:27:23 +0000 (27 10:27 +0100)
tree29ff31acaafd54705245a67e216b2e0cca8fc3e3
parent344744e148e6e865f5a57e745b02a87e5ea534ad
target/arm: Implement FEAT_E0PD

FEAT_E0PD adds new bits E0PD0 and E0PD1 to TCR_EL1, which allow the
OS to forbid EL0 access to half of the address space.  Since this is
an EL0-specific variation on the existing TCR_ELx.{EPD0,EPD1}, we can
implement it entirely in aa64_va_parameters().

This requires moving the existing regime_is_user() to internals.h
so that the code in helper.c can get at it.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20221021160131.3531787-1-peter.maydell@linaro.org
docs/system/arm/emulation.rst
target/arm/cpu.h
target/arm/cpu64.c
target/arm/helper.c
target/arm/internals.h
target/arm/ptw.c