| commit | e0498daab50d42f3948fc5607683c971fe9416fd | |
| author | Tom Musta <tommusta@gmail.com> | |
| Mon, 10 Feb 2014 17:26:58 +0000 (10 11:26 -0600) | ||
| committer | Alexander Graf <agraf@suse.de> | |
| Wed, 5 Mar 2014 02:06:50 +0000 (5 03:06 +0100) | ||
| tree | 82858742f7a1249865ea3317ba0174bbb6233340 | treesnapshot (tar.gz zip) |
| parent | 71a8c019c445377f0dd04881cbd7c7dfb6ff3e5c | commitdiff |
target-ppc: Load Quadword
This patch adds the Book I (user space) Load Quadword (lq) instruction.
This instruction was introduced into Book I in Power ISA V2.07. Previous
versions of the architecture supported this as a privileged instruction.
Previous versions of the architecture also did not support Little Endian
mode.
Note that this patch also adds the PPC_64BX flag to the Power8 model,
which enables the lq instruction.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
This patch adds the Book I (user space) Load Quadword (lq) instruction.
This instruction was introduced into Book I in Power ISA V2.07. Previous
versions of the architecture supported this as a privileged instruction.
Previous versions of the architecture also did not support Little Endian
mode.
Note that this patch also adds the PPC_64BX flag to the Power8 model,
which enables the lq instruction.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
| target-ppc/translate.c | diffblobblamehistory | |
| target-ppc/translate_init.c | diffblobblamehistory |