| commit | df6adb68c1b1808f164c9ed8a04fe14d9c04e82c | |
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Mon, 7 Dec 2020 21:33:22 +0000 (7 22:33 +0100) | ||
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Sun, 13 Dec 2020 18:58:54 +0000 (13 19:58 +0100) | ||
| tree | 9ca6f70276d7e91c3f96e60d7e114e103ab41348 | treesnapshot (tar.gz zip) |
| parent | ac70f9767cba3a5966f7eefc102fcda8b3c7d09e | commitdiff |
target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument
Introduce cpu_supports_isa() which takes a CPUMIPSState
argument, more useful at runtime when the CPU is created
(no need to call the extensive object_class_by_name()).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201207215257.4004222-3-f4bug@amsat.org>
Introduce cpu_supports_isa() which takes a CPUMIPSState
argument, more useful at runtime when the CPU is created
(no need to call the extensive object_class_by_name()).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201207215257.4004222-3-f4bug@amsat.org>
| target/mips/cpu.c | diffblobblamehistory | |
| target/mips/cpu.h | diffblobblamehistory |