accel/tcg: Pass read access type through to io_readx()
commitdbea78a4d696e35d28a35db95cb29ff075626150
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 14 Aug 2018 16:17:19 +0000 (14 17:17 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 14 Aug 2018 16:17:19 +0000 (14 17:17 +0100)
treedf8a5230e1e960b252449cd11b795f24400f30f6
parentc4379b4874f4c522f6818f1720f295205d7cf34d
accel/tcg: Pass read access type through to io_readx()

The io_readx() function needs to know whether the load it is
doing is an MMU_DATA_LOAD or an MMU_INST_FETCH, so that it
can pass the right value to the cpu_transaction_failed()
function. Plumb this information through from the softmmu
code.

This is currently not often going to give the wrong answer,
because usually instruction fetches go via get_page_addr_code().
However once we switch over to handling execution from non-RAM by
creating single-insn TBs, the path for an insn fetch to generate
a bus error will be through cpu_ld*_code() and io_readx(),
so without this change we will generate a d-side fault when we
should generate an i-side fault.

We also have to pass the access type via a CPU struct global
down to unassigned_mem_read(), for the benefit of the targets
which still use the cpu_unassigned_access() hook (m68k, mips,
sparc, xtensa).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20180710160013.26559-2-peter.maydell@linaro.org
accel/tcg/cputlb.c
accel/tcg/softmmu_template.h
include/qom/cpu.h
memory.c