target/riscv: Define ePMP mseccfg
commitdb9f1dac4854199b17121eafcb2baf512bd5bf5c
authorHou Weiying <weiying_hou@outlook.com>
Mon, 19 Apr 2021 06:16:38 +0000 (19 16:16 +1000)
committerAlistair Francis <alistair.francis@wdc.com>
Tue, 11 May 2021 10:02:06 +0000 (11 20:02 +1000)
tree25be15bb82a286822f0b51fb7b1f46463084308f
parent94c6ba83c1a1e45558bd32421b85233053a1c6f3
target/riscv: Define ePMP mseccfg

Use address 0x390 and 0x391 for the ePMP CSRs.

Signed-off-by: Hongzheng-Li <Ethan.Lee.QNL@gmail.com>
Signed-off-by: Hou Weiying <weiying_hou@outlook.com>
Signed-off-by: Myriad-Dreamin <camiyoru@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 63245b559f477a9ce6d4f930136d2d7fd7f99c78.1618812899.git.alistair.francis@wdc.com
[ Changes by AF:
 - Tidy up commit message
]
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
target/riscv/cpu_bits.h