| commit | d913c3992dfd9506a8201c2995d7c910a18db92f | |
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Wed, 16 Dec 2020 11:09:08 +0000 (16 12:09 +0100) | ||
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Thu, 14 Jan 2021 16:13:53 +0000 (14 17:13 +0100) | ||
| tree | a8fa3629ea6d29bd36d37f397ca722a46c9e688f | treesnapshot (tar.gz zip) |
| parent | 4d1524d2ce2f809ae514b23f8e9d502d051c6df4 | commitdiff |
target/mips/mips-defs: Use ISA_MIPS32R5 definition to check Release 5
Use the single ISA_MIPS32R5 definition to check if the Release 5
ISA is supported, whether the CPU support 32/64-bit.
For now we keep '32' in the definition name, we will rename it
as ISA_MIPS_R5 in few commits.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-10-f4bug@amsat.org>
Use the single ISA_MIPS32R5 definition to check if the Release 5
ISA is supported, whether the CPU support 32/64-bit.
For now we keep '32' in the definition name, we will rename it
as ISA_MIPS_R5 in few commits.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-10-f4bug@amsat.org>
| target/mips/mips-defs.h | diffblobblamehistory |