hw/arm/smmu: Consolidate ASID and VMID types
commitd883822641748e2d3629fdea722192986238d2ff
authorMostafa Saleh <smostafa@google.com>
Mon, 15 Jul 2024 08:45:06 +0000 (15 08:45 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 18 Jul 2024 12:49:29 +0000 (18 13:49 +0100)
treec4461e05b1da9c076e4c2b54968ccac985a4d63b
parenta9e3f4c1ebeead57008ebe1c0e9f4e50d5020105
hw/arm/smmu: Consolidate ASID and VMID types

ASID and VMID used to be uint16_t in the translation config, however,
in other contexts they can be int as -1 in case of TLB invalidation,
to represent all (don’t care).
When stage-2 was added asid was set to -1 in stage-2 and vmid to -1
in stage-1 configs. However, that meant they were set as (65536),
this was not an issue as nesting was not supported and no
commands/lookup uses both.

With nesting, it’s critical to get this right as translation must be
tagged correctly with ASID/VMID, and with ASID=-1 meaning stage-2.
Represent ASID/VMID everywhere as int.

Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Mostafa Saleh <smostafa@google.com>
Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20240715084519.1189624-7-smostafa@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/smmu-common.c
hw/arm/smmuv3.c
hw/arm/trace-events
include/hw/arm/smmu-common.h